| Age | Commit message (Expand) | Author |
|---|---|---|
| 2018-12-18 | Fix typos involving "the the" | Jonathan Neuschäfer |
| 2017-06-07 | Use more secure HTTPS URLs for coreboot sites | Paul Menzel |
| 2016-03-21 | Documentation: x86 MTRR setup, TempRamExit and MTRR loading | Lee Leahy |
| 2016-03-21 | Documentation: x86 shadow ROM disable | Lee Leahy |
| 2016-02-29 | Documentation/Intel: More CorebootPayloadPkg documentation | Lee Leahy |
| 2016-02-24 | Documentation/Intel: Add minimal APCI and TempRamExit documentation | Lee Leahy |
| 2016-02-19 | Documentation: x86 device tree processing and memory map | Lee Leahy |
| 2016-02-05 | Documentation: x86 add sleep state and minimal memory setup | Lee Leahy |
| 2016-02-05 | Documentation: x86 Enable Serial Output | Lee Leahy |
| 2016-02-05 | Documentation: Add the x86 FSP Binary | Lee Leahy |
| 2016-02-05 | Documentation: Fix links to Intel/documentation.html | Lee Leahy |
| 2016-02-04 | Documentation: Add x86 bootblock support | Lee Leahy |
| 2016-02-02 | Documentation: Add x86 documentation for required files | Lee Leahy |
 |
index : coreboot | |
| Some coreboot project code with my work | vimacs |
| summaryrefslogtreecommitdiff |