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-rw-r--r--src/cpu/intel/socket_PGA370/Kconfig14
1 files changed, 13 insertions, 1 deletions
diff --git a/src/cpu/intel/socket_PGA370/Kconfig b/src/cpu/intel/socket_PGA370/Kconfig
index 1805e6a294..bfabfb8471 100644
--- a/src/cpu/intel/socket_PGA370/Kconfig
+++ b/src/cpu/intel/socket_PGA370/Kconfig
@@ -21,10 +21,22 @@ config CPU_INTEL_SOCKET_PGA370
bool
select MMX
select UDELAY_TSC
+ select CACHE_AS_RAM
+
+if CPU_INTEL_SOCKET_PGA370
# Not all CPUs for Socket 370 can do SSE2
config SSE2
bool
default n
- depends on CPU_INTEL_SOCKET_PGA370
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xc0000
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x01000
+
+endif