coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2018-05-24	Remove leftover Intel CPU support	Kyösti Mälkki
2016-03-10	northbridge/intel/i440bx: Unify UDELAY selection	Stefan Reinauer
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-06-08	Remove empty lines at end of file	Elyes HAOUAS
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2014-12-30	intel CAR: Fix DCACHE_RAM_BASE for old sockets	Kyösti Mälkki
2014-07-05	Drop redundant select CACHE_AS_RAM	Kyösti Mälkki
2014-01-16	cpu/intel: Make all Intel CPUs load microcode from CBFS	Alexandru Gagniuc
2013-03-01	GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«	Paul Menzel
2010-10-15	Drop unused DCACHE_RAM_BASE from intel/car/cache_as_ram.inc-using sockets.	Uwe Hermann
2010-10-13	Convert all Intel i810 boards to CAR.	Uwe Hermann
2010-05-14	license header fixes	Nils Jacobs
2010-03-17	more warning fixes.	Stefan Reinauer
2010-01-25	Fix ACPI build on a couple of boards (now that it's active)	Patrick Georgi
2009-10-09	Remove default n statements to simplify .config and ldoptions files.	Myles Watson
2009-10-08	Set MMX and SSE where needed. Note that many boards don't even bother	Ronald G. Minnich
2009-09-29	More consistent use of "default n" and "select XYZ" in	Patrick Georgi
2009-08-12	Kconfig!	Patrick Georgi