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Diffstat (limited to 'src/northbridge/intel/haswell/raminit.c')
-rw-r--r--src/northbridge/intel/haswell/raminit.c118
1 files changed, 62 insertions, 56 deletions
diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c
index 290e402fcb..da068bab7d 100644
--- a/src/northbridge/intel/haswell/raminit.c
+++ b/src/northbridge/intel/haswell/raminit.c
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <console/console.h>
+#include <console/streams.h>
#include <console/usb.h>
#include <string.h>
#include <cbmem.h>
@@ -19,6 +20,8 @@
#include "raminit.h"
#include "pei_data.h"
#include "haswell.h"
+#include <soc/intel/broadwell/include/soc/iomap.h>
+#include "bdw_pei_data.h"
#define MRC_CACHE_VERSION 1
@@ -29,28 +32,6 @@ void save_mrc_data(struct pei_data *pei_data)
pei_data->mrc_output_len);
}
-static void prepare_mrc_cache(struct pei_data *pei_data)
-{
- size_t mrc_size;
-
- /* Preset just in case there is an error */
- pei_data->mrc_input = NULL;
- pei_data->mrc_input_len = 0;
-
- pei_data->mrc_input =
- mrc_cache_current_mmap_leak(MRC_TRAINING_DATA,
- MRC_CACHE_VERSION,
- &mrc_size);
- if (!pei_data->mrc_input)
- /* Error message printed in find_current_mrc_cache */
- return;
-
- pei_data->mrc_input_len = mrc_size;
-
- printk(BIOS_DEBUG, "%s: at %p, size %zx\n", __func__,
- pei_data->mrc_input, mrc_size);
-}
-
static const char *const ecc_decoder[] = {
"inactive",
"active on IO",
@@ -98,6 +79,28 @@ static void report_memory_config(void)
}
}
+static void BDW_ABI_X86 send_to_console(unsigned char b)
+{
+ console_tx_byte(b);
+}
+
+static void broadwell_fill_pei_data(struct bdw_pei_data *pei_data)
+{
+ pei_data->pei_version = BDW_PEI_VERSION;
+ pei_data->board_type = BDW_ULT;
+ pei_data->usbdebug = CONFIG(USBDEBUG);
+ pei_data->pciexbar = MCFG_BASE_ADDRESS;
+ pei_data->smbusbar = SMBUS_BASE_ADDRESS;
+ pei_data->ehcibar = EARLY_EHCI_BAR;
+ pei_data->xhcibar = EARLY_XHCI_BAR;
+ pei_data->gttbar = EARLY_GTT_BAR;
+ pei_data->pmbase = ACPI_BASE_ADDRESS;
+ pei_data->gpiobase = GPIO_BASE_ADDRESS;
+ pei_data->tseg_size = CONFIG_SMM_TSEG_SIZE;
+ pei_data->temp_mmio_base = EARLY_TEMP_MMIO;
+ pei_data->tx_byte = &send_to_console;
+ pei_data->ddr_refresh_2x = 1;
+}
/**
* Find PEI executable in coreboot filesystem and execute it.
*
@@ -105,44 +108,37 @@ static void report_memory_config(void)
*/
void sdram_initialize(struct pei_data *pei_data)
{
- int (*entry)(struct pei_data *pei_data) __attribute__((regparm(1)));
-
- uint32_t type = CBFS_TYPE_MRC;
- struct cbfsf f;
-
- printk(BIOS_DEBUG, "Starting UEFI PEI System Agent\n");
-
- /*
- * Always pass in mrc_cache data. The driver will determine
- * whether to use the data or not.
- */
- prepare_mrc_cache(pei_data);
-
- /* If MRC data is not found, we cannot continue S3 resume */
- if (pei_data->boot_mode == 2 && !pei_data->mrc_input) {
- post_code(POST_RESUME_FAILURE);
- printk(BIOS_DEBUG, "Giving up in %s: No MRC data\n", __func__);
- system_reset();
+ int BDW_ABI_X86 mrc_entry(struct bdw_pei_data *);
+ int BDW_ABI_X86 refcode_entry(struct bdw_pei_data *);
+
+ struct bdw_pei_data bdw_pei;
+ memset(&bdw_pei, 0, sizeof(bdw_pei));
+ broadwell_fill_pei_data(&bdw_pei);
+
+ bdw_pei.dimm_channel0_disabled = pei_data->dimm_channel0_disabled;
+ bdw_pei.dimm_channel1_disabled = pei_data->dimm_channel1_disabled;
+ bdw_pei.dq_pins_interleaved = pei_data->dq_pins_interleaved;
+ memcpy(bdw_pei.spd_addresses, pei_data->spd_addresses, sizeof(bdw_pei.spd_addresses));
+ bdw_pei.disable_saved_data = 1;
+ bdw_pei.saved_data = NULL;
+ bdw_pei.saved_data_size = 0;
+
+ for (int i = 0; i < BDW_MAX_USB2_PORTS; i++) {
+ bdw_pei.usb2_ports[i].length = pei_data->usb2_ports[i].length;
+ bdw_pei.usb2_ports[i].enable = pei_data->usb2_ports[i].enable;
+ bdw_pei.usb2_ports[i].oc_pin = pei_data->usb2_ports[i].over_current_pin;
+ bdw_pei.usb2_ports[i].location = pei_data->usb2_ports[i].location;
}
- /* Pass console handler in pei_data */
- pei_data->tx_byte = do_putchar;
-
- /*
- * Locate and call UEFI System Agent binary. The binary needs to be at a fixed offset
- * in the flash and can therefore only reside in the COREBOOT fmap region.
- */
- if (cbfs_locate_file_in_region(&f, "COREBOOT", "mrc.bin", &type) < 0)
- die("mrc.bin not found!");
+ for (int i = 0; i < BDW_MAX_USB3_PORTS; i++) {
+ bdw_pei.usb3_ports[i].enable = pei_data->usb3_ports[i].enable;
+ bdw_pei.usb3_ports[i].oc_pin = pei_data->usb3_ports[i].over_current_pin;
+ }
- /* We don't care about leaking the mapping */
- entry = rdev_mmap_full(&f.data);
- if (entry) {
- int rv = entry(pei_data);
+ printk(BIOS_DEBUG, "Starting UEFI PEI System Agent\n");
- /* The mrc.bin reconfigures USB, so usbdebug needs to be reinitialized */
- if (CONFIG(USBDEBUG_IN_PRE_RAM))
- usbdebug_hw_init(true);
+ if (true) {
+ int rv = mrc_entry(&bdw_pei);
if (rv) {
switch (rv) {
@@ -158,6 +154,16 @@ void sdram_initialize(struct pei_data *pei_data)
die_with_post_code(POST_INVALID_VENDOR_BINARY,
"Nonzero MRC return value.\n");
}
+
+ rv = refcode_entry(&bdw_pei);
+
+ /* The mrc.bin reconfigures USB, so usbdebug needs to be reinitialized */
+ if (CONFIG(USBDEBUG_IN_PRE_RAM))
+ usbdebug_hw_init(true);
+
+ if (rv) {
+ printk(BIOS_ERR, "refcode returns %d.\n", rv);
+ }
} else {
die("UEFI PEI System Agent not found.\n");
}