diff options
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/skylake/acpi.c | 29 |
1 files changed, 18 insertions, 11 deletions
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c index 1beff3d3af..ae9d78436c 100644 --- a/src/soc/intel/skylake/acpi.c +++ b/src/soc/intel/skylake/acpi.c @@ -425,22 +425,19 @@ static unsigned long acpi_fill_dmar(unsigned long current) const bool gfxvten = MCHBAR32(GFXVTBAR) & 1; /* iGFX has to be enabled, GFXVTBAR set and in 32-bit space. */ - if (igfx_dev && igfx_dev->enabled && gfxvten && - gfx_vtbar && !MCHBAR32(GFXVTBAR + 4)) { - unsigned long tmp = current; + const bool emit_igd = + igfx_dev && igfx_dev->enabled && + gfx_vtbar && gfxvten && + !MCHBAR32(GFXVTBAR + 4); + + /* First, add DRHD entries */ + if (emit_igd) { + const unsigned long tmp = current; current += acpi_create_dmar_drhd(current, 0, 0, gfx_vtbar); current += acpi_create_dmar_ds_pci(current, 0, 2, 0); acpi_dmar_drhd_fixup(tmp, current); - - /* Add RMRR entry */ - tmp = current; - - current += acpi_create_dmar_rmrr(current, 0, - sa_get_gsm_base(), sa_get_tolud_base() - 1); - current += acpi_create_dmar_ds_pci(current, 0, 2, 0); - acpi_dmar_rmrr_fixup(tmp, current); } const u32 vtvc0bar = MCHBAR32(VTVC0BAR) & ~0xfff; @@ -461,6 +458,16 @@ static unsigned long acpi_fill_dmar(unsigned long current) acpi_dmar_drhd_fixup(tmp, current); } + /* Then, add RMRR entries after all DRHD entries */ + if (emit_igd) { + const unsigned long tmp = current; + + current += acpi_create_dmar_rmrr(current, 0, + sa_get_gsm_base(), sa_get_tolud_base() - 1); + current += acpi_create_dmar_ds_pci(current, 0, 2, 0); + acpi_dmar_rmrr_fixup(tmp, current); + } + return current; } |