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coreboot
2560p
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autoport-hsw
broadwell_refcode
e6230
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haswell-mrc
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Some coreboot project code with my work
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cache_as_ram.inc
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Commit message (
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Author
2019-11-21
cpu/amd/fam10: Drop support
Arthur Heymans
2019-09-10
AUTHORS: Move src/cpu/amd copyrights into AUTHORS file
Martin Roth
2019-08-18
amdfam10-15: Rename DCACHE_BSP_STACK_SIZE
Kyösti Mälkki
2019-03-08
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
Julius Werner
2018-11-05
cpu/amd: Use common AMD's MSR
Elyes HAOUAS
2018-10-18
cpu/amd: Use common AMD's MSR
Elyes HAOUAS
2018-09-18
cpu/*/car: fix ancient URL explaining XIP range run-time calculation
Stefan Tauner
2018-06-27
x86/car: Replace reference of copy_and_run location
Kyösti Mälkki
2017-08-22
AMD K8 fam10-15: Tidy up CAR stack switch
Kyösti Mälkki
2017-08-22
AMD K8 fam10-15: Consolidate post_cache_as_ram call
Kyösti Mälkki
2017-06-28
cpu/amd: add IS_ENABLED() around Kconfig symbol references
Martin Roth
2017-06-07
src: change coreboot to lowercase
Martin Roth
2017-06-07
Use more secure HTTPS URLs for coreboot sites
Paul Menzel
2015-11-18
cpu/amd/fam10h-fam15h: Update Fam15h APIC config and startup sequence
Timothy Pearson
2015-11-15
cpu/amd: Fix AMD Family 15h ECC initialization reliability issues
Timothy Pearson
2015-11-10
cpu/amd/car: Add romstage BSP stack overrun detection
Timothy Pearson
2015-11-02
cpu/amd: Add initial AMD Family 15h support
Timothy Pearson
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-30
cpu/amd/car: Honor BKDG recommendations for DisFillP in CAR
Timothy Pearson
2015-10-15
cpu/mtrr.h: Fix macro names for MTRR registers
Alexandru Gagniuc
2015-07-07
x86: Drop -Wa,--divide
Stefan Reinauer
2015-07-07
cpu/amd/car: Move AP stacks below the BSP stack to free up space
Timothy Pearson
2015-07-07
cpu/amd/car: Increase Family 10h CAR size limit to 128k
Timothy Pearson
2015-07-07
cpu/amd: Detect any conflicts between sysinfo and the stack region
Timothy Pearson
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-03-07
AMD: Uniformly define MSRs for TOP_MEM and TOP_MEM2
Kyösti Mälkki
2014-11-14
AMD (K8/fam10): Rewrite CAR migration in post_cache_as_ram
Kyösti Mälkki
2014-04-09
cpu/amd/car: Use define MSR_MCFG_BASE rather than hardcoded value
Patrick Georgi
2013-12-02
amd/car/post_cache_as_ram: Switch stack in assembly rather than in C
Vladimir Serbinenko
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2012-11-28
amdk8/amdfam10: Use CAR_GLOBAL for sysinfo
Patrick Georgi
2012-04-25
Replace cache control magic numbers with symbols
Patrick Georgi
2012-02-17
Remove whitespace.
Patrick Georgi
2011-11-01
Remove XIP_ROM_BASE
Patrick Georgi
2011-10-30
Fix slow CAR execution introduced by 7c7d87182feb78cb2bc02fb3558bef56a41682c9
Rudolf Marek
2011-10-28
Get rid of AUTO_XIP_ROM_BASE
Patrick Georgi
2011-04-21
more ifdef -> if fixes
Stefan Reinauer
2011-04-14
Use symbolic names for some MTRR bits instead of numbers in CAR code
Stefan Reinauer
2011-02-10
According to AMD documentation, cache type WP should be used for
Scott Duplichan
2011-01-19
Revert r5902 to make code more readable again. At least three people like to
Stefan Reinauer
2010-10-19
For AMD family 10h processors, msr c0010058 is always programmed
Scott Duplichan
2010-10-12
Reduce duplicate definition in CAR code.
Warren Turkal
2010-10-02
Add comments to make it clear why these two lines are written like that:
Uwe Hermann
2010-10-01
Factor out common CAR asm snippets.
Uwe Hermann
2010-10-01
Add missing parenthesis (trivial).
Uwe Hermann
2010-10-01
CAR simplifications, typos, readability improvements (trivial).
Uwe Hermann
2010-09-30
Various cosmetic and coding style fixes in CAR code (trivial).
Uwe Hermann
2010-09-30
Use existing, readable MTRR #defines instead of hardcoding numbers.
Uwe Hermann
2010-09-14
This patch corrects a coding error in the original implementation
Scott Duplichan
2010-09-13
CONFIG_MMCONF_SUPPORT is always defined. Fix build.
Myles Watson
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