coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-11-02	cpu/intel/car/non-evict/cache_as_ram.S: Add support for longmode	Patrick Rudolph
2020-06-13	cpu/intel/car: Use symbols for CAR MTRR setup	Kyösti Mälkki
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-04	src/cpu: Use SPDX for GPL-2.0-only files	Angel Pons
2019-12-17	cpu/intel: Remove ROMCC header guards and code	Elyes HAOUAS
2019-11-25	Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol	Arthur Heymans
2019-11-12	arch/x86/car.ld: Rename suffix _start/_end	Arthur Heymans
2019-09-10	AUTHORS: Move src/cpu/intel copyrights into AUTHORS file	Martin Roth
2019-04-21	cpu/intel/haswell: Use C_ENVIRONMENT_BOOTBLOCK	Arthur Heymans
2019-03-08	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner
2019-02-10	cpu/intel/car/*/cache_as_ram.S: Add brackets around operand	Arthur Heymans
2019-01-17	cpu/intel/car: Remove unneeded white space	Elyes HAOUAS
2019-01-15	cpu/intel/socket_FCBGA559: Use the non-evict cache as ram setup	Arthur Heymans
2019-01-14	cpu/intel/car/non-evict: Update microcode in CAR setup	Arthur Heymans
2019-01-08	cpu/intel/car: Prepare for C_ENVIRONMENT_BOOTBLOCK	Kyösti Mälkki
2018-12-21	car/non-evict/cache_as_ram.S: Use tabs instead of spaces	Arthur Heymans
2018-08-13	cpu/intel/car: Align the stack to 16 bytes before romstage_main	Arthur Heymans
2018-06-05	cpu/intel/car/non-evict: Improve a few things	Arthur Heymans
2018-06-05	cpu/intel/car/non-evict: Prepare for some POSTCAR_STAGE support	Arthur Heymans