| Age | Commit message (Expand) | Author |
|---|---|---|
| 2018-01-15 | Intel i3100 boards & chips: Remove - using LATE_CBMEM_INIT | Martin Roth |
| 2016-12-18 | intel cache-as-ram: Move DCACHE_RAM_BASE | Kyösti Mälkki |
| 2015-03-10 | x86 cache-as-ram: Remove BROKEN_CAR_MIGRATE option | Kyösti Mälkki |
| 2015-01-27 | vboot2: add verstage | Stefan Reinauer |
| 2014-12-19 | intel/truxton: Add dummy cache-as-ram region | Kyösti Mälkki |
| 2014-05-06 | Introduce stage-specific architecture for coreboot | Furquan Shaikh |
| 2014-05-03 | Move ARCH_* from board/Kconfig to cpu or soc Kconfig. | Furquan Shaikh |
| 2014-01-16 | cpu/intel: Make all Intel CPUs load microcode from CBFS | Alexandru Gagniuc |
| 2010-04-26 | I meant SSE. Reported by Dustin Harrison. | Myles Watson |
| 2010-04-26 | Enable SSE2 for ep80579. Reported by Dustin Harrison. | Myles Watson |
| 2009-10-09 | Remove default n statements to simplify .config and ldoptions files. | Myles Watson |
| 2009-09-29 | More consistent use of "default n" and "select XYZ" in | Patrick Georgi |
| 2009-09-25 | some progress on kconfig: | Patrick Georgi |
 |
index : coreboot | |
| Some coreboot project code with my work | vimacs |
| summaryrefslogtreecommitdiff |