coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2019-11-21	nb/sb/cpu: Drop Intel Rangeley support	Arthur Heymans
2019-09-10	AUTHORS: Move src/cpu/intel copyrights into AUTHORS file	Martin Roth
2019-03-29	src: Use include <reset.h> when appropriate	Elyes HAOUAS
2019-03-01	device/pci: Fix PCI accessor headers	Kyösti Mälkki
2018-11-12	src: Remove unneeded include "{arch,cpu}/cpu.h"	Elyes HAOUAS
2018-05-31	{cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate	Nico Huber
2017-03-16	cpu/intel: Wrap lines at 80 columns	Lee Leahy
2017-03-16	cpu/intel: Fix the spacing issues	Lee Leahy
2017-03-16	cpu/intel: Indent with tabs	Lee Leahy
2015-12-06	Remove #ifdef checks on Kconfig symbols	Martin Roth
2015-11-16	intel/fsp_rangeley: Load BSP microcode in bootblock	David Guckian
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-10-15	cpu/mtrr.h: Fix macro names for MTRR registers	Alexandru Gagniuc
2015-10-14	Revert "Remove FSP Rangeley SOC and mohonpeak board support"	Martin Roth
2015-10-03	Remove FSP Rangeley SOC and mohonpeak board support	Alexandru Gagniuc
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2014-11-07	cpu/intel/fsp_model_406dx: Invaild include path	Edward O'Callaghan
2014-07-30	cpu/intel: Add fsp version of model 406dx (Rangeley / Atom C2000)	Martin Roth