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coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
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hp9480m
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Some coreboot project code with my work
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romstage.c
Age
Commit message (
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Author
2020-07-08
haswell: relocate `romstage_common` to northbridge
Angel Pons
2020-07-08
nb/intel/haswell: Drop unnecessary variable
Angel Pons
2020-07-08
haswell: drop unused function parameter
Angel Pons
2020-06-06
cpu/intel/haswell: Remove unused 'include <cpu/x86/bist.h>'
Elyes HAOUAS
2020-05-13
src: Remove unused '#include <stdint.h>'
Elyes HAOUAS
2020-05-11
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-04-04
src/cpu: Use SPDX for GPL-2.0-only files
Angel Pons
2019-09-10
AUTHORS: Move src/cpu/intel copyrights into AUTHORS file
Martin Roth
2019-08-18
cpu/intel: Enter romstage without BIST
Kyösti Mälkki
2019-08-11
intel/haswell: Move platform_enter_postcar()
Kyösti Mälkki
2019-07-04
arch/x86: Adjust size of postcar stack
Kyösti Mälkki
2019-06-21
cpu: Add missing #include <commonlib/helpers.h>
Elyes HAOUAS
2019-03-27
Move calls to quick_ram_check() before CBMEM init
Kyösti Mälkki
2019-03-20
src: Use 'include <string.h>' when appropriate
Elyes HAOUAS
2019-03-16
src: Drop unused '#include <halt.h>'
Elyes HAOUAS
2019-03-08
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
Julius Werner
2019-03-06
src: Drop unused include <arch/acpi.h>
Elyes HAOUAS
2019-03-04
arch/io.h: Drop unnecessary include
Kyösti Mälkki
2019-02-12
postcar: Make more use of postcar_frame_add_romcache()
Nico Huber
2019-01-09
cpu/intel: Use the common code to initialize the romstage timestamps
Arthur Heymans
2019-01-03
nb/intel/haswell: Add support for PEG
Tristan Corrick
2018-11-16
src: Remove unneeded include <cbfs.h>
Elyes HAOUAS
2018-11-12
src: Remove unneeded include "{arch,cpu}/cpu.h"
Elyes HAOUAS
2018-10-22
intel: Use CF9 reset (part 1)
Patrick Rudolph
2018-09-28
src/*: normalize Google copyright headers
Patrick Georgi
2018-08-13
src: Get rid of non-local header treated as local
Elyes HAOUAS
2018-07-25
drivers/tpm: Add TPM ramstage driver for devices without vboot.
Philipp Deppenwiese
2018-06-14
cpu/intel/haswell: Use the common intel romstage_main function
Arthur Heymans
2018-06-05
cpu/intel/haswell: Switch to POSTCAR_STAGE
Arthur Heymans
2018-06-04
security/tpm: Unify the coreboot TPM software stack
Philipp Deppenwiese
2018-01-18
security/tpm: Change TPM naming for different layers.
Philipp Deppenwiese
2018-01-18
security/tpm: Move tpm TSS and TSPI layer to security section
Philipp Deppenwiese
2017-10-04
chromeec: Remove checks for EC in RO
Daisuke Nojiri
2017-06-28
cpu/intel: add IS_ENABLED() around Kconfig symbol references
Martin Roth
2017-06-16
haswell: add CBMEM_MEMINFO table when initing RAM
Matt DeVillier
2017-03-16
cpu/intel: Fix brace issues detected by checkpatch.pl
Lee Leahy
2017-03-16
cpu/intel: Fix the spacing issues
Lee Leahy
2017-03-16
cpu/intel: Indent with tabs
Lee Leahy
2016-12-06
CPU: Declare cpu_phys_address_size() for all arch
Kyösti Mälkki
2016-12-01
romstage_handoff: remove code duplication
Aaron Durbin
2016-11-18
intel post-car: Increase stacktop alignment
Kyösti Mälkki
2016-10-31
lib/prog_loaders: use common ramstage_cache_invalid()
Aaron Durbin
2016-07-31
src/cpu: Capitalize ROM and RAM
Elyes HAOUAS
2016-07-23
intel/haswell post-car: Minor fix on MTRR setting
Kyösti Mälkki
2016-07-23
intel/haswell: Add asmlinkage for romstage_after_car()
Kyösti Mälkki
2016-07-10
intel post-car: Consolidate choose_top_of_stack()
Kyösti Mälkki
2016-06-29
intel/haswell: No need for ACPI S3 resume backup
Kyösti Mälkki
2016-06-29
intel romstage: Use run_ramstage()
Kyösti Mälkki
2016-06-22
ACPI S3: Add common recovery code
Kyösti Mälkki
2016-06-22
Ignore RAMTOP for MTRRs
Kyösti Mälkki
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