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coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
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intel
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model_65x
Age
Commit message (
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Author
2020-05-10
src/cpu: Replace GPLv2 long form headers with SPDX header
Elyes HAOUAS
2020-04-04
src/cpu: Use SPDX for GPL-2.0-only files
Angel Pons
2020-01-18
cpu/intel/model_6?x{slot_1}: Leave enabling CONFIG_SMP to the mainboard
Keith Hui
2019-09-10
AUTHORS: Move src/cpu/intel copyrights into AUTHORS file
Martin Roth
2019-07-01
Use 3rdparty/intel-microcode
Arthur Heymans
2018-06-01
src/cpu: Remove unneeded includes
Elyes HAOUAS
2017-11-23
Constify struct cpu_device_id instances
Jonathan Neuschäfer
2016-08-23
src/cpu: Capitalize CPU, APIC and IOAPIC typo fix
Elyes HAOUAS
2016-07-31
src/cpu: Capitalize CPU
Elyes HAOUAS
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-09-30
cpu: microcode: Use microcode stored in binary format
Alexandru Gagniuc
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-05-05
3rdparty: move to 3rdparty/blobs
Patrick Georgi
2015-05-05
3rdparty: Move to blobs
Patrick Georgi
2015-02-28
cpu/intel: (non-FSP) Remove microcode updates from tree
Alexandru Gagniuc
2015-02-28
cpu/intel (non-FSP): Use microcode from blobs repository
Alexandru Gagniuc
2015-01-27
vboot2: add verstage
Stefan Reinauer
2014-10-27
{arch,cpu,drivers,ec}: Don't hide pointers behind typedefs
Edward O'Callaghan
2014-05-06
Introduce stage-specific architecture for coreboot
Furquan Shaikh
2014-05-03
Move ARCH_* from board/Kconfig to cpu or soc Kconfig.
Furquan Shaikh
2014-02-12
PCI: Drop includes under cpu
Kyösti Mälkki
2014-01-16
cpu/intel: Remove dummy terminators from microcode blobs
Alexandru Gagniuc
2014-01-16
cpu/intel: Make all Intel CPUs load microcode from CBFS
Alexandru Gagniuc
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2012-11-27
Get rid of drivers class
Patrick Georgi
2012-01-10
MTRR: get physical address size from CPUID
Sven Schnelle
2011-08-04
cpu/intel/slot_1: Init L2 cache on SECC(2) CPUs.
Keith Hui
2010-10-18
update intel microcode files.
Stefan Reinauer
2010-10-16
Move support for Deschutes Slot 1 CPUs (model_65x) into its own directory.
Keith Hui