coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-11-13	nb/intel/haswell/acpi: Merge `haswell.asl` into `hostbridge.asl`	Angel Pons
2020-10-13	{src/mb,util/autoport}: Use macro for DSDT revision	Elyes HAOUAS
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-06	treewide: replace GPLv2 long form headers with SPDX header	Patrick Georgi
2020-05-06	treewide: Move "is part of the coreboot project" line in its own comment	Patrick Georgi
2020-05-02	acpi: Move ACPI table support out of arch/x86 (3/5)	Furquan Shaikh
2020-03-18	mainboard/[a-f]*: Remove copyright notices	Patrick Georgi
2019-11-04	sb/intel/lynxpoint: Use sb/intel/common/platform.asl	Arthur Heymans
2019-11-01	soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpi	Subrata Banik
2018-11-30	cpu/intel/common: Use a common acpi/cpu.asl file	Arthur Heymans
2018-11-23	mb: Set coreboot as DSDT's manufacturer model ID	Elyes HAOUAS
2018-11-21	ACPI: Fix DSDT's revision field	Elyes HAOUAS
2018-11-16	mainboard: Add ASRock H81M-HDS	Tristan Corrick