Age | Commit message (Expand) | Author |
---|---|---|
2019-11-15 | nb/intel/x4x: Move to C_ENVIRONMENT_BOOTBLOCK | Arthur Heymans |
2019-11-15 | nb/intel/x4x: Move boilerplate romstage to a common location | Arthur Heymans |
2019-11-14 | sb/intel/i82801jx: Move early sb init to a common place | Arthur Heymans |
2019-11-12 | sb/intel/i82801jx: Add common code for LPC decode | Arthur Heymans |
2019-11-11 | mb/{x4x}: Remove unused 'include <northbridge/intel/x4x/iomap.h>' | Elyes HAOUAS |
2019-08-26 | soc/intel: Use common romstage code | Kyösti Mälkki |
2019-08-18 | cpu/intel: Enter romstage without BIST | Kyösti Mälkki |
2019-04-13 | sb/intel/i82801jx: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIB | Patrick Rudolph |
2019-03-04 | arch/io.h: Drop unnecessary include | Kyösti Mälkki |
2019-03-01 | device/pci: Fix PCI accessor headers | Kyösti Mälkki |
2019-01-10 | mb: Move timestamp_add_now to northbridge x4x | Elyes HAOUAS |
2019-01-09 | cpu/intel: Use the common code to initialize the romstage timestamps | Arthur Heymans |
2018-10-15 | mb/asus/p5qc: Add mainboard | Arthur Heymans |