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:
coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
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path:
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src
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mainboard
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emulation
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qemu-riscv
/
memlayout.ld
Age
Commit message (
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Author
2020-12-02
cbfs: Enable CBFS mcache on most chipsets
Julius Werner
2020-05-11
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-04-04
mainboard/emulation: Use SPDX for GPL-2.0-only files
Angel Pons
2020-03-18
mainboard/[a-f]*: Remove copyright notices
Patrick Georgi
2019-12-11
fmap: Make FMAP_CACHE mandatory if it is configured in
Julius Werner
2019-08-03
mb/emulation/qemu-riscv: Add opensbi support
Patrick Rudolph
2019-07-30
mb/emulation/qemu-riscv: Protect CBFS from payload loader
Patrick Rudolph
2019-06-21
mb/emulation/qemu-riscv: Support arbitrary ROM sizes
Patrick Rudolph
2019-01-26
mb/qemu-riscv: update to match current qemu version
Philipp Hug
2018-04-27
RISC-V boards: Remove PAGETABLES section from memlayout.ld
Jonathan Neuschäfer
2016-10-24
RISCV: Clean up the common architectural code
Ronald G. Minnich
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-06-08
Remove empty lines at end of file
Elyes HAOUAS
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-04-06
New mechanism to define SRAM/memory map with automatic bounds checking
Julius Werner