coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-05-09	src/: Replace GPL boilerplate with SPDX headers	Patrick Georgi
2020-03-18	mainboard/[g-p]*: Remove copyright notices	Patrick Georgi
2019-01-23	nb/intel/i945: Use parallel MP init	Arthur Heymans
2018-01-26	mb///cmos.layout: Fix the values for the console level	Arthur Heymans
2017-09-23	mb//: Remove rtc nvram configurable baud rate	Arthur Heymans
2016-08-31	i945: Enable changing VRAM size	Arthur Heymans
2016-08-17	mainboard: Clean up boot_option/reboot_bits in cmos.layout	Nico Huber
2016-08-14	src/mainboard: Capitalize ROM, RAM, CPU and APIC	Elyes HAOUAS
2015-11-05	mainboard: Remove last_boot NVRAM option	Timothy Pearson
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-02-16	mainboard/cmos: Delete obsolete commented parameters	Timothy Pearson
2014-07-18	mainboard: Trivial - drop trailing blank lines at EOF	Edward O'Callaghan
2012-02-17	Remove whitespace.	Patrick Georgi
2011-01-27	Add a new CMOS variable which triggers activation of the	Patrick Georgi
2011-01-14	Allow coreboot to initialize CMOS if checksum is invalid.	Patrick Georgi
2010-05-16	Add support for the Getac P470	Stefan Reinauer