coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2018-06-11	mainboard/google/kahlee: Remove Kahlee variant	Martin Roth
2018-06-03	mb/google/kahlee: Remove #include <soc/smi.h>	Richard Spiegel
2018-05-27	stoneyridge GPIO: Create and use PAD_INT for interrupt pins	Richard Spiegel
2018-04-20	soc/amd/stoneyridge/include/soc/southbridge.c: Rename gpio structure	Richard Spiegel
2018-04-18	mb/google/kahlee/variants/kahlee/gpio.c: Convert GPIO to new format	Richard Spiegel
2018-03-19	soc/amd/stoneyridge/southbridge.c: Remove configure_stoneyridge_uart	Richard Spiegel
2018-02-17	soc/amd/stoneyridge: Normalize GPIO init	Justin TerAvest
2018-01-23	google/kahlee/variants/(kahlee/baseboard)/gpio.c: Convert GPIO table	Richard Spiegel
2018-01-23	soc/amd/stoneyridge/southbridge.c: Create a GPIO programming function	Richard Spiegel
2017-12-14	mainboard/google/kahlee: Update overcurrent pins	Martin Roth
2017-12-12	soc/amd/common: Move Agesa related headers	Richard Spiegel
2017-12-06	google/kahlee: Set USB OC pins	Marc Jones
2017-11-14	mb/google/kahlee: Remove direct AGESA header includes	Martin Roth
2017-11-13	mb/google/kahlee: Add getter function for GPIO array	Martin Roth
2017-11-13	mb/google/kahlee: Remove mainboard.h	Martin Roth
2017-11-03	mainboard/google/kahlee: Prepare for variants	Martin Roth