coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-06-15	i945 boards: Factor out MAX_CPUS	Angel Pons
2020-05-18	mainboard///*.cb: Remove leading blank lines from SPDX header	Elyes HAOUAS
2020-05-18	mainboard///Kconfig*: Remove leading blank lines from SPDX header	Elyes HAOUAS
2020-05-18	src: Remove leading blank lines from SPDX header	Elyes HAOUAS
2020-05-13	src: Remove unused '#include <stdint.h>'	Elyes HAOUAS
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-09	src/: Replace GPL boilerplate with SPDX headers	Patrick Georgi
2020-05-02	acpi: Move ACPI table support out of arch/x86 (3/5)	Furquan Shaikh
2020-04-09	mb/intel/d945gclf: Improve code formatting of devicetree	Elyes HAOUAS
2020-04-06	mainboard/intel: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	mainboard/[g-p]*: Remove copyright notices	Patrick Georgi
2020-01-02	mb/intel/d945gclf: Remove unused include	Elyes HAOUAS
2019-12-31	mb/**/acpi: Remove unused files	Angel Pons
2019-12-31	mb/**/dsdt.asl: Remove outdated sleepstates.asl comment	Angel Pons
2019-12-21	mb/**/dsdt.asl: Remove "Some generic macros" comment	Angel Pons
2019-12-20	src/mainboard: Remove unused '#include <device/pci.h>'	Elyes HAOUAS
2019-12-10	mainboard/(i945,ich7): Remove commented RCBA32(0x341c) code	Elyes HAOUAS
2019-11-23	Kconfig: comply to Linux 5.3's Kconfig language rules	Patrick Georgi
2019-11-17	mb/{i945,ich7}: Remove redundant write on V0CTL	Elyes HAOUAS
2019-11-15	nb/intel/i945: Initialize console in bootblock	Arthur Heymans
2019-11-15	nb/intel/i945: Move boilerplate romstage to a common location	Arthur Heymans
2019-11-14	sb/intel/i82801gx: Add common early code	Arthur Heymans
2019-11-12	sb/intel/i82801gx: Add common LPC decode code	Arthur Heymans
2019-11-01	soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpi	Subrata Banik
2019-10-27	mb/(ich7): Use macro instead of magic number	Elyes HAOUAS
2019-10-11	sb/intel/i82801gx: Move CIR init to a common place	Arthur Heymans
2019-08-26	soc/intel: Use common romstage code	Kyösti Mälkki
2019-08-18	cpu/intel: Enter romstage without BIST	Kyösti Mälkki
2019-08-18	mainboards: Remove floating __PRE_RAM__ comments	Kyösti Mälkki
2019-07-20	mb/,sb/intel/i82801gx: Merge `ide_legacy_combined` into `sata_mode`	Nico Huber
2019-06-14	nb/i945: Drop CHANNEL_XOR_RANDOMIZATION selection	Elyes HAOUAS
2019-06-06	sb/intel/i82801gx: Detect if the southbridge supports AHCI	Arthur Heymans
2019-06-05	mb/*/devicetree.cb: Remove unavailable PCIe ports	Arthur Heymans
2019-04-13	sb/intel/i82801gx: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIB	Patrick Rudolph
2019-03-24	nb/intel/i945: Use DEBUG_RAM_SETUP	Kyösti Mälkki
2019-03-20	src: Use 'include <string.h>' when appropriate	Elyes HAOUAS
2019-03-18	mb/(ICH7): Remove initialization already done at early_init.c	Elyes HAOUAS
2019-03-13	src/mainboard///cstates.c: Drop unused includes	Elyes HAOUAS
2019-03-08	src/mb: Shorten 'include <arch/x86/include/arch/acpigen.h>'	Elyes HAOUAS
2019-03-04	arch/io.h: Drop unnecessary include	Kyösti Mälkki
2019-03-01	device/pci: Fix PCI accessor headers	Kyösti Mälkki
2019-02-07	src: Remove unused include device/pnp_def.h	Elyes HAOUAS
2019-01-23	nb/intel/i945: Use parallel MP init	Arthur Heymans
2019-01-09	cpu/intel: Use the common code to initialize the romstage timestamps	Arthur Heymans
2019-01-08	sb/intel/i82801gx: Autodisable functions based on devicetree	Arthur Heymans
2019-01-08	mb/{ga-g41m-es2l,d945gclf,rk886ex}: Fix devicetree	Arthur Heymans
2018-11-28	mb///Kconfig: Remove useless comment	Elyes HAOUAS
2018-11-23	mb: Set coreboot as DSDT's manufacturer model ID	Elyes HAOUAS
2018-11-21	ACPI: Fix DSDT's revision field	Elyes HAOUAS
2018-11-12	mb//: Harmonise FD and devicetree on boards featuring ICH7	Arthur Heymans