coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2021-01-27	ACPI: Add top-level ASL	Kyösti Mälkki
2020-10-13	{src/mb,util/autoport}: Use macro for DSDT revision	Elyes HAOUAS
2020-10-05	soc/intel/common/block/acpi: Factor out common platform.asl	Subrata Banik
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-02	acpi: Move ACPI table support out of arch/x86 (3/5)	Furquan Shaikh
2020-04-06	mainboard/intel: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	mainboard/[g-p]*: Remove copyright notices	Patrick Georgi
2019-12-31	mb/**/dsdt.asl: Remove outdated sleepstates.asl comment	Angel Pons
2019-12-21	mb/**/dsdt.asl: Remove "Some generic macros" comment	Angel Pons
2019-11-01	soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpi	Subrata Banik
2018-11-30	cpu/intel/common: Use a common acpi/cpu.asl file	Arthur Heymans
2018-11-23	mb: Set coreboot as DSDT's manufacturer model ID	Elyes HAOUAS
2018-11-21	ACPI: Fix DSDT's revision field	Elyes HAOUAS
2017-12-19	mainboard/intel/saddlebrook: add support for Saddle Brook	Teo Boon Tiong