coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2021-05-18	mb/intel/shadowmountain: Update mainboard properties	John Zhao
2021-05-18	mb/intel/shadowmountain: Remove power_gpio from baseboard	John Zhao
2021-05-18	soc/intel/alderlake: mb/intel/sm: Add tcss code	Deepti Deshatty
2021-04-23	mb/intel/shadowmountain: Enable HECI1 interface	Sridhar Siricilla
2021-04-23	mb/intel/shadowmountain: Enable RTD3 for SD card	Rizwan Qureshi
2021-04-22	soc/intel/alderlake: Add enum for HDA audio configuration	Sugnan Prabhu S
2021-04-22	soc/intel/alderlake and mb: Drop PchHdaAudioLink*Enable UPDs from chip.h	Furquan Shaikh
2021-04-21	soc/intel/alderlake: Drop unused `PrmrrSize` from devicetree	Angel Pons
2021-04-21	mb/intel/shadowmountain: Disable GSPI1 interface connected to FPS	Sridhar Siricilla
2021-04-10	mb/intel/shadowmountain: Enable Bluetooth config in the devicetree	Sridhar Siricilla
2021-04-06	mb/intel/shadowmountain: Add Cr50 support	Aamir Bohra
2021-03-26	mb/intel/shadowmountain: Disable the unused CPU PCIe RP	V Sowmya
2021-03-17	mb/intel/shadowmountain: Update HDMI audio mode to 8T	Sugnan Prabhu S
2021-03-17	mb/intel/shadowmountain: Disable xDCI	Sugnan Prabhu S
2021-03-15	mb/intel/shadowmountain: Add ACPI entry for BT reset GPIO	Aamir Bohra
2021-03-12	mb/intel/shadowmountain: Enable Type-C subsystem	V Sowmya
2021-02-27	mb/intel/shadowmountain: Add the ramstage code	V Sowmya
2021-02-22	mb/intel/shadowmountain: Add the romstage code	V Sowmya
2021-02-06	mb/intel/shadowmountain: Add bootblock and verstage code	V Sowmya
2020-12-21	mb/intel/shadowmountain: Add Intel Pre-CEP shadowmountain board	V Sowmya