coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2018-01-15	Intel sch board & chip: Remove - using LATE_CBMEM_INIT	Martin Roth
2016-09-20	src/mainboard/getac - kontron: Add space around operators	Elyes HAOUAS
2016-08-23	src/mainboard: Remove unnecessary whitespace before "\n"	Elyes HAOUAS
2016-06-21	intel/car/cache_as_ram_ht.inc: Prepare for dynamic CONFIG_RAMTOP	Kyösti Mälkki
2016-05-17	intel/sch: Merge northbridge and southbridge in src/soc	Stefan Reinauer
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-01-06	mainboard/*/romstage.c: Sanitize system header inclusions	Edward O'Callaghan
2014-08-15	intel/cpu: rename car.h to romstage.h	Aaron Durbin
2014-08-14	Intel: Add common header file for CAR setup	Edward O'Callaghan
2014-07-24	src/mainboard: Remove trailing whitespace	Elyes HAOUAS
2013-03-22	x86: Unify arch/io.h and arch/romcc_io.h	Stefan Reinauer
2012-10-26	iwave/iWRainbowG6: use 16bit access for a register which is not 32bit aligned	Sebastian Andrzej Siewior
2011-04-20	run uart_init() from console_init, just like the other console initialization...	Stefan Reinauer
2010-12-18	Fix a few whitespace and coding style issues.	Uwe Hermann
2010-12-18	Support Intel SCH (Poulsbo) and add iwave/iWRainbowG6 board	Patrick Georgi