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coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
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path:
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src
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mainboard
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jetway
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j7f2
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romstage.c
Age
Commit message (
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Author
2018-05-31
Remove all VIA CN700 boards
Kyösti Mälkki
2017-08-24
mainboard/via*: Drop AMD car.h file
Marc Jones
2017-04-14
southbridge/via/vt8237r: Get rid of #include early_smbus.c
Lubomir Rintel
2017-04-06
northbridge/via/cn700: Get rid of #include raminit.c
Lubomir Rintel
2016-11-09
mainboard/jetway/j7f2: transition away from device_t
Antonello Dettori
2016-06-18
AMD boards: Fix romstage main() declaration
Kyösti Mälkki
2016-03-10
cpu/via/c7: Don't manually include udelay_io.c
Stefan Reinauer
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-01-06
mainboard/*/romstage.c: Fix 'lib/delay.c' inclusion
Edward O'Callaghan
2015-01-06
mainboard/*/romstage.c: Sanitize system header inclusions
Edward O'Callaghan
2014-12-02
Replace hlt with halt()
Patrick Georgi
2014-08-15
intel/cpu: rename car.h to romstage.h
Aaron Durbin
2014-08-14
Intel: Add common header file for CAR setup
Edward O'Callaghan
2014-04-26
superio/fintek/*: Factor out generic romstage component
Edward O'Callaghan
2014-04-02
superio/fintek/f71805f: Avoid .c includes
Edward O'Callaghan
2014-01-19
jetway/j7f24: Rename to jetway/j7f2.
Vladimir Serbinenko