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coreboot
2560p
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autoport-hsw
broadwell_refcode
e6230
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haswell-mrc
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mec1322
Some coreboot project code with my work
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alix1c
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cache_as_ram_auto.c
Age
Commit message (
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Author
2010-02-08
janitor task: unify and cleanup naming.
Stefan Reinauer
2010-01-16
coreboot used to have two different "APIs" for memory accesses:
Stefan Reinauer
2009-09-23
simplify source tree hierarchy: move files from sdram/ and ram/ to lib/
Stefan Reinauer
2009-06-30
This patch unifies the use of config options in v2 to all start with CONFIG_
Stefan Reinauer
2009-04-20
Fix implicit declarations of done_cache_as_ram_main by adding a
Carl-Daniel Hailfinger
2008-01-18
Rename almost all occurences of LinuxBIOS to coreboot.
Stefan Reinauer
2008-01-18
Please bear with me - another rename checkin. This qualifies as trivial, no
Stefan Reinauer
2007-11-13
Random minor cosmetical or coding style fixes (trivial).
Uwe Hermann
2007-11-07
Final set of changes to make Alix1c work.
Ronald G. Minnich
2007-11-01
This patch is a trivial response to a good comment from Uwe, so I am
Ronald G. Minnich
2007-10-26
This code gets us to a working linux boot on the alix1c. I have not tested
Ronald G. Minnich
2007-09-09
Partial changes and fixup.
Ronald G. Minnich
2007-09-08
Welcome to PC Engines and the ALIX 1C!
Ronald G. Minnich