coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-05-04	mb/purism/librem_skl: Convert to use override devicetree	Matt DeVillier
2020-05-04	mb/purism/librem_skl: drop SataSpeedLimit restriction	Matt DeVillier
2020-05-01	mb/purism/librem_skl: Use ACPI backlight controls	Benjamin Doron
2020-01-10	mb/**/devicetree.cb: Remove untrue comments	Angel Pons
2019-10-29	purism/librem_skl: add libgfxinit support	Matt DeVillier
2019-04-06	{mb,soc/intel/skylake}: remove unused InternalGfx	Maxim Polyakov
2019-03-01	soc/intel/skylake: Unify serial IRQ options	Nico Huber
2019-02-18	soc/intel/skylake: Use real common code for VMX init	Nico Huber
2018-07-11	skylake: Remove "IshEnable"	li feng
2018-06-14	src: Get rid of unneeded whitespace	Elyes HAOUAS
2018-06-06	soc/intel/common/block: Add common chip config block	Subrata Banik
2018-06-05	soc/intel/skylake: Add option to skip coreboot MP init	Subrata Banik
2018-04-06	purism/librem_skl: Add AC/DC LoadLine to VR Config	Youness Alaoui
2018-04-06	purism/librem_skl: Set TCC Activation at 95C	Youness Alaoui
2018-04-06	purism/librem_skl: Enable VMX and Intel SpeedStep in devicetree	Youness Alaoui
2018-04-06	purism/librem_skl: Enable TPM support	Youness Alaoui
2018-03-28	soc/intel/skylake: Limit xDCI feature when VBOOT is enabled	Duncan Laurie
2018-03-26	purism/librem13v1, librem13v2, liberm15v3: Fix EC LPC I/O port	Youness Alaoui
2017-10-26	purism/librem13v2: convert to variant setup	Matt DeVillier