coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-12-17	soc/intel/cannonlake: Change mainboard_silicon_init_params argument	Patrick Rudolph
2020-12-16	mb/purism/librem_cnl: Use FMAP-based SPD cache	Matt DeVillier
2020-12-15	mb/purism/librem_mini: Adjust PL1/2 levels	Matt DeVillier
2020-12-14	soc/intel/skylake: Drop always-zero ProbelessTrace dt setting	Angel Pons
2020-12-14	soc/intel/skylake: Drop unreferenced PttSwitch dt setting	Angel Pons
2020-12-14	mb/purism/librem_cnl: move setting of FSP-M UPDs into variant.c	Matt DeVillier
2020-12-08	mb/*: Remove SATA mode config for CNL based mainboards	Felix Singer
2020-12-08	soc/intel/cannonlake: Align SATA mode names with soc/skl	Felix Singer
2020-12-06	mb/*: Remove unnecessary selects	Felix Singer
2020-11-13	soc/intel/{skl,cnl}: replace PM ACPI timer dt option by Kconfig	Michael Niewöhner
2020-11-13	broadwell: Flatten `acpi_init_gnvs` function	Angel Pons
2020-11-13	broadwell: Factor out `acpi_fill_madt` function	Angel Pons
2020-11-13	soc/intel/broadwell/acpi: Rename `systemagent.asl`	Angel Pons
2020-11-09	mb/purism/librem_cnl: Add new variant 'Librem Mini v2'	Matt DeVillier
2020-11-09	mb/purism/librem_mini: Fix USB_OC mapping in devicetree	Matt DeVillier
2020-11-09	mb/purism/librem_mini: drop PcieRpSlotImplemented from LAN PCIe	Matt DeVillier
2020-11-09	mb/purism/librem_mini: Update smbios_slot_desc for M.2/WLAN	Matt DeVillier
2020-11-09	mb/purism/librem_mini: Fix PCIe clock source mapping in devicetree	Matt DeVillier
2020-11-09	mb/purism/librem_mini: Adjust GPIO pad config per schematics	Matt DeVillier
2020-11-06	mb/purism/librem_mini: Set unused GPIO pads to PAD_NC	Matt DeVillier
2020-11-05	mb/purism/librem_mini: Drop DW0/DW1 from GPIO config comments	Matt DeVillier
2020-11-04	mb/purism/librem_cnl: Set SaGv to FixedHigh	Angel Pons
2020-11-04	mb/purism/librem_mini: Drop community comments in GPIO config	Matt DeVillier
2020-11-04	mb/purism/librem_mini: Update GPIO config	Matt DeVillier
2020-11-04	mb/purism_librem_mini: Add child device, slot descriptions to PCIe RPs	Matt DeVillier
2020-11-04	mb/purism/librem_mini: Reorganize devicetree	Matt DeVillier
2020-11-04	mb/purism/librem_mini: drop unused HeciEnabled register	Matt DeVillier
2020-11-04	mb/purism/librem_mini: Increase TDP/PL2 setting	Matt DeVillier
2020-11-04	mb/purism/librem_mini: Drop devicetree settings which default to 0	Matt DeVillier
2020-11-04	mb/purism/librem_mini: drop SendVrMbxCmd from devicetree	Matt DeVillier
2020-11-03	soc/intel/broadwell: Relocate PCH ACPI files	Angel Pons
2020-11-03	mb/purism/librem_cnl: Adjust in preparation for new variants	Matt DeVillier
2020-11-03	mb/purism/librem_whl: rename to librem_cnl	Matt DeVillier
2020-10-30	soc/intel/broadwell: Separate PCH in devicetree	Angel Pons
2020-10-30	mb/purism/librem_bdw: Prepare devicetree for PCH split	Angel Pons
2020-10-26	mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable`	Michael Niewöhner
2020-10-21	soc/intel,mb/*: get rid of legacy pad macros	Michael Niewöhner
2020-10-19	mb/purism/librem_skl: Clean up FSP-M RCOMP settings	Angel Pons
2020-10-14	mb/purism/librem_skl: Drop DQ and DQS byte maps	Angel Pons
2020-10-13	{src/mb,util/autoport}: Use macro for DSDT revision	Elyes HAOUAS
2020-10-05	soc/intel/common/block/acpi: Factor out common platform.asl	Subrata Banik
2020-09-28	mb/purism/librem_whl: Drop 3Gbps SATA limit; enable and set SATA tuning params	Matt DeVillier
2020-09-28	mb/purism/librem_skl: Enable and set SATA tuning params	Matt DeVillier
2020-09-08	soc/intel/broadwell: Drop `gpu_panel_port_select`	Angel Pons
2020-09-06	mb/*: devicetree: drop now unneeded USBx_PORT_EMPTY	Michael Niewöhner
2020-09-04	soc/intel/cnl: Enable HECI3 depending on devicetree	Felix Singer
2020-08-23	soc/intel/cnl: Configure FSP option PcieRpSlotImplemented	Nico Huber
2020-08-21	mb/purism/librem_whl: Convert GPIOs to macros	Matt DeVillier
2020-08-18	mb/purism/librem_whl: Add new board Librem Mini (WHL-U)	Matt DeVillier
2020-08-08	soc/intel/skylake: Enable CIO depending on devicetree configuration	Felix Singer