index
:
coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
mainboard
/
siemens
/
sitemp_g1p1
/
mptable.c
Age
Commit message (
Expand
)
Author
2018-05-31
Remove all AMD K8 boards
Kyösti Mälkki
2018-05-08
mb/siemens: Get rid of device_t
Elyes HAOUAS
2016-09-26
mainboard/*/*/mptable.c: Improve code formatting
Elyes HAOUAS
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-02-15
x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer
Kevin Paul Herbert
2013-03-01
GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
Paul Menzel
2012-03-08
Unify Local APIC address definitions
Patrick Georgi
2011-11-01
remove trailing whitespace
Stefan Reinauer
2011-10-28
siemens/sitemp_g1p1: Add more devices to PIR and MP table
Patrick Georgi
2011-10-13
siemens/sitemp_g1p1: Don't mess with virtual wire settings
Patrick Georgi
2011-10-13
siemens/sitemp_g1p1: Get rid of bus_isa and bus_type
Patrick Georgi
2011-10-13
mptable: Refactor mptable generation some more
Patrick Georgi
2011-10-13
mptable: Get rid of fixup_virtual_wire
Patrick Georgi
2011-10-13
mptable: Refactor lintsrc generation
Patrick Georgi
2011-05-11
Add Siemens SITEMP-G1 board
Josef Kellermann