summaryrefslogtreecommitdiff
path: root/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
AgeCommit message (Expand)Author
2019-11-20nb/amd/fam10: Drop supportArthur Heymans
2019-06-21nb/amd/amdmct/mct_ddr3: Remove duplicate conditionalJacob Garber
2019-06-21nb/amd/amdmct/mct_ddr3: Remove duplicate codeJacob Garber
2019-06-03nb/amd/amdmct/mct_ddr3/mct_d.c: Remove variable set but not usedElyes HAOUAS
2019-05-29src/northbridge: Add missing 'include <types.h>'Elyes HAOUAS
2019-04-25src/northbridge/amd: Remove unused variablesElyes HAOUAS
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2019-03-01device/pci: Fix PCI accessor headersKyösti Mälkki
2018-11-08nb/amd/amdmct/mct_ddr3: Replace MTRR addresses with macrosElyes HAOUAS
2018-11-08src: Replace common MSR addresses with macrosElyes HAOUAS
2018-10-31reset: Finalize move to new APINico Huber
2018-10-30{cpu,drivers,nb,sb}/amd: Replace {MSR,MTRR} addresses with macrosElyes HAOUAS
2018-10-18cpu/amd: Use common AMD's MSRElyes HAOUAS
2018-06-14src: Get rid of unneeded whitespaceElyes HAOUAS
2017-08-10nb/amd_fam10/mct_ddr3: Use common function to compute crc16 checksumArthur Heymans
2017-01-19nb/amd/ddr3: Make the maximum CDD a signed valueTimothy Pearson
2017-01-11amd/mct/ddr3: Fix unintended sign extension warningTimothy Pearson
2017-01-11amd/mct/ddr3: Rework memory speed to clock value conversion logicTimothy Pearson
2017-01-10amd/mct/ddr3: Allow critical delay delta to go negativeTimothy Pearson
2017-01-10amd/mct/ddr3: Wait for northbridge P-state transitionsTimothy Pearson
2017-01-10amd/mct/ddr2|ddr3: Refactor persistent members of DCTStatStrucTimothy Pearson
2017-01-04amdfam10: Perform major include ".c" cleanupDamien Zammit
2016-10-09northbridge/amd/amdmct/mct_ddr3: Remove commented codeElyes HAOUAS
2016-10-04src/northbridge: Remove unnecessary whitespaceElyes HAOUAS
2016-09-21northbridge/amd/amdmct: Improve code formattingElyes HAOUAS
2016-09-12src/northbridge: Improve code formattingElyes HAOUAS
2016-08-31northbridge/amd: Add required space before opening parenthesis '('Elyes HAOUAS
2016-08-23src/northbridge: Remove unnecessary whitespace before "\n" and "\t"Elyes HAOUAS
2016-05-09nb/amd/mct_ddr3: Report correct DIMM size in SMBIOS structureTimothy Pearson
2016-05-09nb/amd/mct_ddr3: Add support for non-ECC DIMMs on AMD Family 15hTimothy Pearson
2016-04-28nb/amd/mct_ddr3: Restart system on training failure instead of using die()Timothy Pearson
2016-04-22Revert "nb/amd/mct_ddr3: Disable MCE framework during DRAM training"Timothy Pearson
2016-04-08Revert "nb/amd/mct_ddr3: Enable DIMM parity when RDIMMs installed"Timothy Pearson
2016-04-08nb/amd/mct_ddr3: Add MCE reporting logicTimothy Pearson
2016-04-08nb/amd/mct_ddr3: Cache whether ECC is allowed at the platform levelTimothy Pearson
2016-03-31nb/amd_mct_ddr3: Move DRAM MCE sync flood enable to ramstageTimothy Pearson
2016-03-31nb/amd/mct_ddr3: Clear early MCEs and report DRAM MCEsTimothy Pearson
2016-03-31nb/amd/mct_ddr3: Disable MCE framework during DRAM trainingTimothy Pearson
2016-03-30nb/amd/mct_ddr3: Enable DIMM parity when RDIMMs installedTimothy Pearson
2016-03-30northbridge/amd/amdfam10: Add family15h model10h-1fh (Trinity)Damien Zammit
2016-03-28nb/amd/mct_ddr3: Use standard C function calls in mct_ResetDataStruct_D()Timothy Pearson
2016-03-26nb/amd/amdmct: Select max_lanes based on ECC presence or absenceDamien Zammit
2016-03-24nb/amd/mct_ddr3: Set the NBP0 read latency from P0 trained valuesTimothy Pearson
2016-02-19nb/amd/amdmct: Add socket specific configuration for FM2Damien Zammit
2016-02-05nb/amd/mct_ddr3: Work around RDIMM training failureTimothy Pearson
2016-01-29nb/amdmct/mct_ddr3: Enable mainboard voltage setTimothy Pearson
2016-01-24nb/amd/mct_ddr3: Update drive strength configurationTimothy Pearson
2016-01-24northbridge/amd/amdmct/mct_ddr3: Enable fast refresh on ETR devicesTimothy Pearson
2016-01-24northbridge/amd/amdmct: Add termination and timing values for C32 socketsTimothy Pearson
2015-12-01nb/amd/mct_ddr3: Add Family 15h tristate enable codesTimothy Pearson