index
:
coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
vimacs
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
northbridge
/
intel
/
nehalem
/
acpi
Age
Commit message (
Expand
)
Author
2019-11-04
nb/intel: Use defined DEFAULT_RCBA
Elyes HAOUAS
2019-10-24
acpi: Drop wrong _ADR objects for PCI host bridges
Elyes HAOUAS
2019-03-08
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
Julius Werner
2019-03-06
Remove DEFAULT_PCIEXBAR alias
Kyösti Mälkki
2017-06-27
nb/intel: add IS_ENABLED() around Kconfig symbol references
Martin Roth
2015-12-16
northbridge/intel ACPI: Remove unused Local method
Martin Roth
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-23
Intel: Move MCRS ResourceTemplate outside of _CRS method
Martin Roth
2015-10-12
gma: Consolidate Intel IGD ACPI code some more
Nico Huber
2015-05-28
igd.asl rewrite
Vladimir Serbinenko
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-02-16
acpi: Generate valid ACPI processor objects
Timothy Pearson
2014-12-06
northbridge/intel/*/acpi/igd.asl: Trivial indent style fix
Edward O'Callaghan
2014-11-23
sandy/ivy/nehalem: Remerge interrupt handling
Vladimir Serbinenko
2014-08-21
Merge LCD on nehalem
Vladimir Serbinenko
2014-07-17
northbridge,ASL: Trivial - drop trailing blank lines at EOF
Edward O'Callaghan
2014-02-24
intel/*/acpi: Increase range length of MCHBAR buffer to 32 kB
Paul Menzel
2013-11-25
Support for nehalem northbridge
Vladimir Serbinenko