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Some coreboot project code with my work
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sb_pci0_fch.asl
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Author
2020-04-28
soc/amd/sata: Move SATA PCI device from DSDT to SSDT
Furquan Shaikh
2020-04-05
soc/amd: Use SPDX for GPL-2.0-only files
Angel Pons
2020-03-18
soc: Remove copyright notices
Patrick Georgi
2019-06-06
soc/amd/stoneyridge: Move LPC support to common
Marshall Dawson
2019-05-15
soc/amd/stoneyridge: Add ACPI D3Cold support for SD Controller
Raul E Rangel
2018-10-05
amd/stoneyridge: Comment PCI and AcpiMmio registers in ASL
Marshall Dawson
2018-10-05
amd/stoneyridge: Remove unused registers from ASL
Marshall Dawson
2018-10-05
amd/stoneyridge: Remove SATA D0 on suspend
Marshall Dawson
2018-10-01
amd/stoneyridge: Add USB ASL for D0/D3cold
Marshall Dawson
2018-10-01
amd/stoneyridge: Add ASL helper for AOAC PwrGood Control
Marshall Dawson
2018-10-01
amd/stoneyridge: Add FCH WAK and PTS methods
Marshall Dawson
2018-10-01
amd/stoneyridge: Add ASL for D-states on AOAC devices
Marshall Dawson
2018-10-01
amd/stoneyridge: Add ACPI MMIO and PCI offsets to ASL
Marshall Dawson
2018-08-17
Fix PCI ACPI _OSC methods
Marc Jones
2018-08-06
soc/amd/stoneyridge: Call AMD ALIB method with AC/DC state
Marc Jones
2018-07-31
src/soc/amd/stoneyridge: Remove IMC support
Richard Spiegel
2018-02-05
soc/amd/stoneyridge/acpi/sb_pci0_fch.asl: Fix instability
Richard Spiegel
2017-11-28
AMD platforms: Fix ASL comment that implies "\_SB" is southbridge
Martin Roth
2017-11-22
Create SOC description file soc.asl
Richard Spiegel