| Age | Commit message (Expand) | Author |
|---|---|---|
| 2020-09-14 | soc/intel/common/cpu: Update COS mask calculation for NEM enhanced mode | Aamir Bohra |
| 2020-06-25 | drivers/intel/fsp2_0: decouple FSP_PEIM_TO_PEIM_INTERFACE from FSP 2.1 | Jonathan Zhang |
| 2020-06-15 | arch/x86: Remove NO_FIXED_XIP_ROM_SIZE | Kyösti Mälkki |
| 2020-03-04 | soc/intel/cpu: Select NO_FIXED_XIP_ROM_SIZE | Arthur Heymans |
| 2019-07-10 | soc/intel/block/cpu: remove unused USE_COREBOOT_NATIVE_MP_INIT | Arthur Heymans |
| 2019-03-24 | soc/intel/common: Add Kconfig option to choose desired MP Init for platform | Subrata Banik |
| 2017-06-23 | soc/intel/common/block: Add common MP Init code | Barnali Sarkar |
| 2017-06-09 | soc/intel/common/block: Add Intel common CPU library code | Barnali Sarkar |
| 2017-03-28 | soc/intel/common/block: Add cache as ram init and teardown code | Subrata Banik |
 |
index : coreboot | |
| Some coreboot project code with my work | vimacs |
| summaryrefslogtreecommitdiff |