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coreboot
2560p
820g2
autoport-hsw
broadwell_refcode
e6230
e7240_bdw
haswell-mrc
hp820g1
hp9480m
mec1322
Some coreboot project code with my work
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Age
Commit message (
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Author
2020-11-02
soc/intel/fsp-car: Use the coreboot defined stack
Arthur Heymans
2020-11-02
drivers/intel/fsp2_0: Add function to report FSP-T output
Arthur Heymans
2020-10-28
soc/intel: deduplicate ACPI timer emulation
Michael Niewöhner
2020-10-21
{cpu,soc}/intel: replace AES-NI locking by common implemenation call
Michael Niewöhner
2020-10-21
soc/intel: convert XTAL frequency constant to Kconfig
Michael Niewöhner
2020-10-21
soc/intel/common: add Kconfig for PM Timer emulation support
Michael Niewöhner
2020-10-16
include/cpu/x86: introduce new helper for (un)setting MSRs
Michael Niewöhner
2020-09-29
soc/intel/common: Add config option to enable TME/MKTME
Pratik Prajapati
2020-09-21
soc/intel: rename get_prmrr_size
Michael Niewöhner
2020-09-21
soc/intel/common/block/sgx: make PRMRR size setting depend on SGX
Michael Niewöhner
2020-09-16
soc/intel/common/block: Do not die if PRMRR size unsupported
Angel Pons
2020-09-15
soc/intel/common/block/cpu: Fix boot failure
Patrick Rudolph
2020-09-14
soc/intel/common/cpu: Update COS mask calculation for NEM enhanced mode
Aamir Bohra
2020-08-27
soc/intel/common: Add Elkhart Lake B0 CPU ID
Tan, Lean Sheng
2020-08-06
soc/intel/common/block/cpu: Refactor init_cpus function
Subrata Banik
2020-08-05
soc/intel/common: Include Alder Lake device IDs
Subrata Banik
2020-07-26
src/soc/intel: Add include <types.h>
Elyes HAOUAS
2020-07-03
soc/intel/common: Only touch Time Window Tau bits in supported SoCs
Tim Wawrzynczak
2020-07-01
soc/intel/common/cpu: Don't set any TCC settings if offset is 0
Tim Wawrzynczak
2020-06-28
soc/intel/common: add TCC activation functionality
Sumeet R Pawnikar
2020-06-25
drivers/intel/fsp2_0: decouple FSP_PEIM_TO_PEIM_INTERFACE from FSP 2.1
Jonathan Zhang
2020-06-15
arch/x86: Remove NO_FIXED_XIP_ROM_SIZE
Kyösti Mälkki
2020-06-06
src: Remove unused 'include <cpu/x86/mtrr.h>'
Elyes HAOUAS
2020-06-06
soc/intel/tigerlake: Add CPU ID for TGL B0
Jamie Ryu
2020-06-01
soc/intel/common/block: Remove unused headers
Angel Pons
2020-05-11
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-05-06
treewide: replace GPLv2 long form headers with SPDX header
Patrick Georgi
2020-05-06
treewide: Move "is part of the coreboot project" line in its own comment
Patrick Georgi
2020-05-02
acpi: Move ACPI table support out of arch/x86 (3/5)
Furquan Shaikh
2020-05-01
src: Remove unused 'include <cpu/x86/cache.h>'
Elyes HAOUAS
2020-04-06
soc/intel/common: Use SPDX for GPL-2.0-only files
Angel Pons
2020-03-18
soc: Remove copyright notices
Patrick Georgi
2020-03-04
soc/intel/cpu: Select NO_FIXED_XIP_ROM_SIZE
Arthur Heymans
2020-02-25
soc/intel/common: Update Jasper Lake Device IDs
Meera Ravindranath
2020-02-04
soc/intel: Remove duplicate CPUID entry
Subrata Banik
2020-01-22
soc/intel/common: Add Elkhartlake Device IDs
Tan, Lean Sheng
2019-12-02
src/soc/intel: Add Cometlake-S and CMP-H skus
Gaggery Tsai
2019-11-15
soc/intel/common: Make alignment proper for comments
Subrata Banik
2019-11-12
arch/x86/car.ld: Rename suffix _start/_end
Arthur Heymans
2019-11-06
soc/intel/common: Make native and FSP-T CAR init mutually exclusive
Arthur Heymans
2019-11-05
soc/intel/common: Include Tigerlake device IDs
Ravi Sarawadi
2019-11-05
soc/intel/common: Don't link CAR teardown in romstage
Arthur Heymans
2019-11-04
soc/intel/sgx: convert SGX and PRMRR devicetree options to Kconfig
Michael Niewöhner
2019-10-31
soc/intel/common: add common function to set LT_LOCK_MEMORY
Michael Niewöhner
2019-09-29
soc/intel: Rename <intelblocks/chip.h>
Kyösti Mälkki
2019-09-11
arch/x86: Restrict use of _car_global[start|end]
Kyösti Mälkki
2019-08-15
soc/*: mp_run_on_all_cpus: Remove configurable timeout
Patrick Rudolph
2019-08-12
soc/intel/common: Fix typo mistake in cache_as_ram.S
Subrata Banik
2019-07-30
soc/intel/cannonlake: Add new PCI IDs
Felix Singer
2019-07-17
soc/intel/cannonlake: Add device Ids for new CFL SKUs support
Lean Sheng Tan
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