coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2019-11-21	soc/intel/fsp_baytrail: Drop support	Arthur Heymans
2019-03-29	src: Use include <reset.h> when appropriate	Elyes HAOUAS
2019-03-04	device/mmio.h: Add include file for MMIO ops	Kyösti Mälkki
2019-03-01	device/pci: Fix PCI accessor headers	Kyösti Mälkki
2018-10-23	src: Remove unneeded whitespace	Elyes HAOUAS
2018-05-31	{cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate	Nico Huber
2015-12-16	intel/fsp_baytrail: rename include folder baytrail to include/soc	Ben Gardner
2015-11-16	intel/fsp_baytrail: Load BSP microcode in bootblock	York Yang
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-10-15	cpu/mtrr.h: Fix macro names for MTRR registers	Alexandru Gagniuc
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-02-15	x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer	Kevin Paul Herbert
2014-12-19	fsp_baytrail: Initialize LPC pads in bootblock for port 80	Martin Roth
2014-05-29	fsp_baytrail: Add the FSP version of Intel's Bay Trail-I chip	Martin Roth