coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2019-11-21	soc/intel/fsp_baytrail: Drop support	Arthur Heymans
2019-08-28	intel/fsp_baytrail: Use smm_subregion()	Kyösti Mälkki
2019-08-21	intel/fsp1_0,baytrail,rangeley: Tidy up use of preprocessor	Kyösti Mälkki
2019-08-15	soc/intel: Rename some SMM support functions	Kyösti Mälkki
2019-08-13	cpu/x86: Separate save_state struct headers	Kyösti Mälkki
2019-03-08	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner
2018-10-05	src: Fix MSR_PKG_CST_CONFIG_CONTROL register name	Elyes HAOUAS
2018-07-24	cpu/x86/mtrr.h: Rename MSR SMRR_PHYS_x to IA32_SMRR_PHYSx	Arthur Heymans
2018-06-04	soc/intel/fsp_baytrail: Get rid of device_t	Elyes HAOUAS
2017-11-23	Constify struct cpu_device_id instances	Jonathan Neuschäfer
2017-09-11	cpu/x86/mp_init: remove adjust_cpu_apic_entry()	Aaron Durbin
2016-07-31	src/soc: Capitalize CPU, ACPI, RAM and ROM	Elyes HAOUAS
2016-05-04	soc/intel/fsp_baytrail: convert to using common MP and SMM init	Aaron Durbin
2016-05-02	cpu/x86/mp_init: remove unused callback arguments	Aaron Durbin
2015-12-16	intel/fsp_baytrail: change indent to use tabs	Ben Gardner
2015-12-16	intel/fsp_baytrail: rename include folder baytrail to include/soc	Ben Gardner
2015-12-06	Remove #ifdef checks on Kconfig symbols	Martin Roth
2015-11-16	intel/fsp_baytrail: Load APs microcode in baytrail_init_cpus	York Yang
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-10-15	cpu/mtrr.h: Fix macro names for MTRR registers	Alexandru Gagniuc
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2014-11-24	intel/fsp_baytrail: add new CPUID for Baytrail I step D0	Herve ELter
2014-10-09	intel/fsp_baytrail: Fix SMM/SMI	Kayalvizhi Dhandapani
2014-05-29	fsp_baytrail: Add the FSP version of Intel's Bay Trail-I chip	Martin Roth