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path: root/src/soc/intel/skylake/romstage/romstage.c
AgeCommit message (Expand)Author
2020-04-06soc/intel/skylake: Use SPDX for GPL-2.0-only filesAngel Pons
2020-03-18soc: Remove copyright noticesPatrick Georgi
2019-12-26soc/intel/skylake: Rename pch_init() codeUsha P
2019-11-27soc/skylake: Write the P2SB IBDF and HBDF registers in corebootAngel Pons
2019-11-22soc/intel/skylake: Refactor pch_early_init() codeUsha P
2019-11-04soc/intel/sgx: convert SGX and PRMRR devicetree options to KconfigMichael Niewöhner
2019-10-26soc/intel/skylake: move/rename files after drop of FSP 1.1Michael Niewöhner
2019-10-26soc/intel/skylake: drop support for FSP 1.1Michael Niewöhner
2019-10-02soc/intel: Replace config_of_path() with config_of_soc()Kyösti Mälkki
2019-09-12src/{northbridge,soc}: Remove not used #include <elog.h>Elyes HAOUAS
2019-07-18soc/intel: Use config_of()Kyösti Mälkki
2019-07-04soc/intel: Replace uses of dev_find_slot()Kyösti Mälkki
2019-05-29Clean up unused arch/early_variables.h headerArthur Heymans
2019-05-07intel/fsp1_1: Drop remnants of `pei_data`Nico Huber
2019-05-07intel/fsp1_1: Move MRC cache pointers into `romstage_params`Nico Huber
2019-04-26soc/{amd,intel}/chip: Use local include for chip.hElyes HAOUAS
2019-03-29src: Use include <reset.h> when appropriateElyes HAOUAS
2019-03-18src: Drop unused 'include <romstage_handoff.h>'Elyes HAOUAS
2019-03-08coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner
2019-03-07src: Drop unused include <timestamp.h>Elyes HAOUAS
2019-03-04arch/io.h: Drop unnecessary includeKyösti Mälkki
2018-12-28arch/x86: Drop spurious arch/stages.h includesKyösti Mälkki
2018-11-23soc/intel/skylake: Drop FSP_CAR optionsNico Huber
2018-11-16src: Remove unneeded include <cbmem.h>Elyes HAOUAS
2018-11-12src: Remove unneeded include "{arch,cpu}/cpu.h"Elyes HAOUAS
2017-10-05soc/intel/skylake: Add support in SKL for PMC common codeShaunak Saha
2017-07-18vboot: Remove get_sw_write_protect_state callbackJulius Werner
2017-05-02soc/intel/skylake: Clean up code by using common FAST_SPI moduleBarnali Sarkar
2016-12-13intel MMA: Enable MMA with FSP2.0Pratik Prajapati
2016-09-15soc/intel/skylake: Add FSP 2.0 support in romstageBarnali Sarkar
2016-08-18soc/intel/skylake: Correct Cache as ram sizeRizwan Qureshi
2016-08-17soc/intel/skylake: restore MCHBAR and DMIBAR programmingRizwan Qureshi
2016-07-28soc/intel/skylake: Add C entry bootblock supportSubrata Banik
2016-07-28bootmode: Get rid of CONFIG_BOOTMODE_STRAPSFurquan Shaikh
2016-06-09skylake: Support common LPSS I2C driverDuncan Laurie
2016-02-29skylake: Increase IGD stolen size to 64MBDuncan Laurie
2016-01-29intel/skylake: Implement native Cache-as-RAM (CAR)Subrata Banik
2016-01-19intel/skylake: Disable SaGv in recovery modeharidhar
2016-01-18intel/skylake: Add devicetree setting for DDR frequency limit UPDDuncan Laurie
2016-01-15intel/skylake: Update UPD parameters as per FSP 1.8.0Barnali Sarkar
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-10-27FSP 1.1: Replace soc_ prefix with fsp_Lee Leahy
2015-10-27intel/skylake: FSP 1.7.0 MemoryInit/SiliconInit params updateRizwan Qureshi
2015-10-11intel fsp1_1: prepare for romstage vboot verification splitAaron Durbin
2015-10-11soc/intel/common: remove chipset specific callsAaron Durbin
2015-10-11intel SOC common: Remove unused parametersLee Leahy
2015-09-23chromeos: vboot and chromeos dependency removal for sw write protect statePaul Kocialkowski
2015-09-08Skylake:Set DISB inside romstage after mrc initDhaval Sharma
2015-08-29intel/skylake: Fix RMT disable of saved training dataDuncan Laurie
2015-08-29intel/skylake: Force full memory train if RMT is enabledDuncan Laurie