coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-08-28	soc/intel/tigerlake: add ddr4-spd-empty.hex	Aaron Durbin
2020-08-28	util: Add memory parts needed by zork boards	Rob Barnes
2020-08-28	util/gen_spd: translate DeviceBusWidth to die bus width	Nick Vaccaro
2020-08-28	util: rename lp4x spds to include "lp4x-" in name	Nick Vaccaro
2020-08-28	util: volteer/dedede: move generic SPDs to common location	Nick Vaccaro
2020-08-25	util: Add spd_tools to generate DDR4 SPDs for TGL boards	Nick Vaccaro
2020-07-07	lp4x: Add new memory parts and generate SPDs	David Wu
2020-06-08	spd/lp4x: Set manufacturer part name to blank (0x20)	Furquan Shaikh
2020-06-06	lp4x: Add new memory parts and generate SPDs	Furquan Shaikh
2020-06-06	soc/intel/tigerlake: Generate LP4x SPD files using gen_spd.go	Furquan Shaikh