Age | Commit message (Expand) | Author |
2020-07-14 | soc/intel/braswell/romstage/romstage.c: Add missing include | Elyes HAOUAS |
2020-07-14 | soc/rockchip/rk3399/display.c: Add missing include | Elyes HAOUAS |
2020-07-14 | src: Remove unused 'include <stdint.h> | Elyes HAOUAS |
2020-07-14 | src: Remove unused 'include <types.h>' | Elyes HAOUAS |
2020-07-13 | soc/amd/picasso: supply SMBIOS type 17 | Rob Barnes |
2020-07-12 | soc/intel/baytrail: Add dedicated devices for MMC and MMC 4.5 controller | Mate Kukri |
2020-07-12 | soc/intel/gpio: Convert PAD_CFG0_ROUTE_* to PAD_IRQ_ROUTE() | Maxim Polyakov |
2020-07-12 | soc/intel/gpio: Convert PAD_CFG0_RX_POL_* to PAD_RX_POL() | Maxim Polyakov |
2020-07-12 | intel/gpio: Convert PAD_CFG0_TRIG_* to PAD_TRIG() | Maxim Polyakov |
2020-07-12 | soc/intel/common/block/pcie: Select ASPM on mainboard basis | Christian Walter |
2020-07-12 | soc/intel/xeon_sp/cpx: use HOB_TYPE_GUID_EXTENSION to interpret platform HOBs | Jonathan Zhang |
2020-07-12 | soc/intel/xeon_sp: Add RTC failure checking | Jingle Hsu |
2020-07-12 | vendocode/intel/fsp/fsp2_0/cpx_sp: Update to FSP ww28 release and adapt soc | Jonathan Zhang |
2020-07-12 | soc/intel/tigerlake: Move tco_configure to bootblock | Tim Wawrzynczak |
2020-07-12 | soc/intel/tigerlake: Configure Type-C Input Output Manager(IOM) device | John Zhao |
2020-07-12 | soc/intel/tigerlake: Add Type-C IOM base address and size macro | John Zhao |
2020-07-12 | soc/intel/tigerlake: Add new IGD device | Ravi Sarawadi |
2020-07-11 | arch/x86: Drop CBMEM_TOP_BACKUP | Kyösti Mälkki |
2020-07-10 | soc/amd/picasso: Add support for DRIVERS_USB_PCI_XHCI | Raul E Rangel |
2020-07-10 | soc/amd/picasso: Delete partially implemented usb implementation | Raul E Rangel |
2020-07-10 | soc/amd/picasso: Add missing include to smi.h | Raul E Rangel |
2020-07-10 | soc/amd/picasso: Avoid NULL pointer dereference | John Zhao |
2020-07-10 | soc/amd/picasso: Add PCI driver for data fabric devices | Furquan Shaikh |
2020-07-10 | soc/amd/picasso: Add driver for handling PCIE GPP bridges | Furquan Shaikh |
2020-07-10 | soc/amd/picasso: Map AOAC registers to enable i2c after S3 | Martin Roth |
2020-07-09 | include/cpu/amd/msr: move SMM_LOCK bit right after HWCR_MSR definition | Felix Held |
2020-07-09 | soc/samsung/exynos5420: Drop dead code | Angel Pons |
2020-07-09 | soc/intel/broadwell/pcie.c: Drop dead code | Angel Pons |
2020-07-09 | soc/samsung/exynos5250: Drop dead code | Angel Pons |
2020-07-09 | soc/amd/picasso: Always load and run display oprom | Rob Barnes |
2020-07-09 | soc/intel/baytrail/pmutil.c: Constify string arrays | Angel Pons |
2020-07-09 | soc/intel/baytrail/pmutil.c: Do not hardcode num_bits | Angel Pons |
2020-07-09 | soc/intel/baytrail: Align whitespace and comments | Angel Pons |
2020-07-09 | soc/intel/baytrail: Rename "pmc.h" to "pm.h" | Angel Pons |
2020-07-09 | mainboard/intel/tglrvp: Remove unused PrmrrSize chip config | Subrata Banik |
2020-07-09 | soc/intel/braswell: Drop some BIOS_SPEW printk's | Angel Pons |
2020-07-09 | soc/intel/braswell/lpss.c: Use 16-bit ops on PCI COMMAND | Angel Pons |
2020-07-09 | soc/amd/picasso: Remove I2C4 | Edward Hill |
2020-07-09 | soc/amd/picasso: Add dummy spinlock for psp_verstage | Martin Roth |
2020-07-08 | soc/amd/picasso: Update APOB size & base generation | Martin Roth |
2020-07-08 | arch/x86: Add memmove.c to x86 bootblock | Martin Roth |
2020-07-08 | src/amd/common: Exclude biosram from psp_verstage | Martin Roth |
2020-07-08 | soc/amd/picasso: Halt if workbuf is absent after psp_verstage | Martin Roth |
2020-07-08 | soc/amd/common: Don't init SMIs or SCIs in psp_verstage | Martin Roth |
2020-07-08 | soc/amd/picasso: Update the AMD firmware in RW-A & RW-B regions | Martin Roth |
2020-07-08 | soc/amd/picasso:Add psp_verstage components to amdfw binary | Martin Roth |
2020-07-08 | soc/amd/picasso: add psp_verstage | Martin Roth |
2020-07-08 | soc/amd/picasso: Allow modification of i2c base addresses in PSP | Martin Roth |
2020-07-07 | soc/intel/common/block: Add new block DTT | Tim Wawrzynczak |
2020-07-07 | soc/intel/tigerlake: Disable Thunderbolt PCIe root ports bus master | John Zhao |