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AgeCommit message (Expand)Author
2020-10-14soc/intel/jasperlake: Enable CAR NEM enhanced modeAamir Bohra
2020-10-14soc/intel/broadwell/xhci.c: Align with Lynx PointAngel Pons
2020-10-14soc/intel/broadwell/smi.c: Drop unused functionsAngel Pons
2020-10-14soc/intel/broadwell/pcie.c: Add some null checksAngel Pons
2020-10-14soc/intel/broadwell: Align cosmetics with Haswell/Lynx PointAngel Pons
2020-10-14soc/intel/broadwell/igd.c: Rename to gma.cAngel Pons
2020-10-14soc/intel/common/block: Enable PMC IPC driverBrandon Breitenstein
2020-10-14soc/intel/alderlake: Enable TME for Alder LakeSubrata Banik
2020-10-14soc/intel/tigerlake: Enable and use USB4 PCIe driverDuncan Laurie
2020-10-14soc/intel/common: Add SSDT generation for Intel USB4 PCIe portsDuncan Laurie
2020-10-14soc/intel/common/block: Add common support for USB4/ThunderboltDuncan Laurie
2020-10-14soc/intel/common: Add PCI driver for USB4 portsTim Wawrzynczak
2020-10-13sc7180: Enable bootblock compressionJulius Werner
2020-10-13soc/intel/common: rewrite and clarify the Legacy 8254 Timer KconfigMichael Niewöhner
2020-10-13mb, soc/intel: Switch to using drivers/wifi/generic for Intel WiFi devicesFurquan Shaikh
2020-10-13src: Rename EM100Pro-specific SPI console Kconfig optionAngel Pons
2020-10-12soc/intel: Configure PAVP at compile-timeBenjamin Doron
2020-10-12soc/intel/cannonlake: Align cosmetics with Ice LakeAngel Pons
2020-10-12soc/mediatek/mt8192: Refactor USB code among similar SoCsZhanyong Wang
2020-10-12soc/intel/jasperlake: Allow mainboard to override chip configurationKarthikeyan Ramasubramanian
2020-10-12soc/intel/jasperlake: Correct SaGv mappingAamir Bohra
2020-10-12soc/intel/common/block/smm: Fix compilation without intel uart codePatrick Rudolph
2020-10-12soc/intel/common/block/i2c: Scan bridge devices behind I2C controllersKarthikeyan Ramasubramanian
2020-10-12util: Add DDR4 generic SPD for H5ANAG6NCJR-XNCNick Vaccaro
2020-10-12soc/intel/jasperlake: Remove GPIO community 2 from DSDTEvan Green
2020-10-09soc/intel/tigerlake: Add chipset devicetreeDuncan Laurie
2020-10-09soc/intel/xeon_sp: Use generic config_tMarc Jones
2020-10-09trogdor: Modify DDR training to use mrc_cacheShelley Chen
2020-10-09soc/intel/xeon_sp: Set CPU_ADDR_BITS to 46 for SKX and CPXChristian Walter
2020-10-09soc/intel/xeon_sp/cpx: skip DRHD generation for non-PCIe stackJonathan Zhang
2020-10-09soc/mediatek: Add function to measure clock frequency of MT8192Weiyi Lu
2020-10-08soc/intel/jasperlake: Add VR Configuration settingsMeera Ravindranath
2020-10-08Revert "soc/intel/jasperlake: Disable PAVP UPD"Nico Huber
2020-10-08soc/intel/xeon_sp/cpx: Add locking of IA32_FEATURE_CONTROL and VMXChristian Walter
2020-10-08soc/intel/xeon_sp/cpx: Add save_dimm_info for SMBIOS type 17Johnny Lin
2020-10-08soc/intel/xeon_sp/cpx: correct GSI bases for IO APICsJonathan Zhang
2020-10-08soc/mediatek: Add function to raise the CPU frequency of MT8192Weiyi Lu
2020-10-08lynxpoint/broadwell: Relegate IOBP printk to BIOS_SPEWAngel Pons
2020-10-08soc/intel: Make use of common gfx.aslSubrata Banik
2020-10-08soc/intel/common/block/acpi: Factor out common gfx.aslSubrata Banik
2020-10-08soc/amd/picasso: Remove xhci0_force_gen1 from soc configChris Wang
2020-10-08soc/amd/picasso: Add UPD for support force USB3 to Gen1 by portChris Wang
2020-10-08soc/amd/picasso: Print values from PSP transfer bufferMartin Roth
2020-10-08soc/amd/picasso: Refactor transfer buffer checkMartin Roth
2020-10-08soc/amd/picasso: Die if the workbuf is missing two boots in a rowMartin Roth
2020-10-07sc7180: Remove LIMITS_CFG loading in romstage.mkurumel
2020-10-07amd/picasso/psp_verstage: use cbmem consoleKangheui Won
2020-10-07amd/picasso/psp_verstage: Add modexp svc wrapperKangheui Won
2020-10-06templates: add an empty SPD to SPD_SOURCESPaul Fagerburg
2020-10-06soc/intel/xeon_sp/skx: Move get_srat_memory_entries()Marc Jones