coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2021-03-09	soc/amd/picasso/Makefile: simplify APOB NV parameter extraction	Felix Held
2021-03-09	soc/intel/xeon_sp: Set SMI lock	Marc Jones
2021-03-09	soc/intel/xeon_sp: Add PCH lockdown	Marc Jones
2021-03-09	soc/intel/common/pch: Add server PCH option	Marc Jones
2021-03-08	soc/amd,mb/google/,mb/amd: Move sleepstates.asl	Raul E Rangel
2021-03-08	cbfs: Pull handling of the CBFS_CACHE mem_pool into CBFS core	Julius Werner
2021-03-08	soc/amd/cezanne: Include gpio.c in smm	Mathew King
2021-03-08	soc/amd/cezanne: Allow GPIO defines to be used in ASL	Mathew King
2021-03-08	soc/amd/common: Move GEVENT definitions to gpio_defs.h	Mathew King
2021-03-08	soc/amd/common/block/graphics/graphics: report GOP frame buffer	Nikolai Vyssotski
2021-03-08	soc/intel/xeon_sp/cpx: Set the MRC "cold boot required" status bit	Deomid "rojer" Ryabkov
2021-03-08	soc/intel/alderlake: Set LidStatus UPD if RUN_FSP_GOP selected	Ronak Kanabar
2021-03-08	soc/mediatek/mt8192: Increase PRERAM_CBMEM_CONSOLE to 400K	Yu-Ping Wu
2021-03-08	soc/mediatek/mt8173,mt8183: revise SOC DRAM implementation	Xi Chen
2021-03-08	soc/mediatek/mt8192: initialize DRAM using vendor reference code	Huayang Duan
2021-03-08	soc/mediatek/common: Move DRAM implementation from mt8192 to common	Xi Chen
2021-03-06	soc/amd/picasso: move APOB NV cache to common code	Felix Held
2021-03-05	soc/intel/adl, mb/google/brya: Add IPU to devicetree	Tim Wawrzynczak
2021-03-05	soc/intel/tigerlake: Enable TCSS Muxes to disconnect mode during boot	Brandon Breitenstein
2021-03-05	soc/intel/broadwell/pch: Rename USB files	Angel Pons
2021-03-05	soc/intel/broadwell/pch: Use Lynx Point smbus.c	Angel Pons
2021-03-05	soc/intel/apollolake: Add `GPE0_STS_BIT` macro	Angel Pons
2021-03-05	soc/intel/common/block/cpu: Use tab instead of space	Subrata Banik
2021-03-05	soc/tigerlake: Fix TCSS code to calling back and forth to mainboard and soc	Brandon Breitenstein
2021-03-05	soc/intel/tigerlake: Fix NULL being passed for response buffer	Furquan Shaikh
2021-03-04	soc/amd/cezanne/chipset.cb: clean up and change some aliases	Felix Held
2021-03-04	soc/amd/cezanne/smihandler: implement S3 entry SMI handler	Felix Held
2021-03-04	soc/amd/cezanne: add SMU support	Felix Held
2021-03-04	soc/rockchip/rk3399/sdram: Add channel to error message	Moritz Fischer
2021-03-04	soc/rockchip/rk3399/sdram: Simplify error condition	Moritz Fischer
2021-03-03	soc/amd/cezanne/chipset.cb: rename alias for SATA controllers	Felix Held
2021-03-03	util: Add new memory part to LP4x list	Amanda Huang
2021-03-03	soc/intel/common/block/smbus: Add config to use ACPI	Maxim Polyakov
2021-03-03	soc/intel: Guard macro parameters in pm.h	Angel Pons
2021-03-03	soc/intel/cannonlake: Move `gpi_clear_int_cfg()` call	Angel Pons
2021-03-03	soc/intel: Factor out common smmrelocate.c	Angel Pons
2021-03-03	soc/intel/skylake: Always print ME FW SKU	Benjamin Doron
2021-03-03	soc/intel/skylake: Enable compression on FSP-S	Benjamin Doron
2021-03-03	soc/intel/alderlake: Log internal device wake events	Tim Wawrzynczak
2021-03-03	soc/intel/alderlake: Add some helper macros for accessing TCSS DMA devices	Tim Wawrzynczak
2021-03-03	soc/intel/alderlake: Add PCIe root port wake sources to elog	Tim Wawrzynczak
2021-03-03	soc/intel/tigerlake: Re-use existing define in CrashLog implementation	Francois Toguo
2021-03-03	soc/intel: Retype `CnviBtAudioOffload` devicetree option	Angel Pons
2021-03-03	soc/intel: Backport SMRR locking support	Angel Pons
2021-03-02	soc/amd/cezanne: Disable legacy DMA IO ports	Raul E Rangel
2021-03-02	soc/amd/cezanne: Fill out pci devices in chipset.cb	Mathew King
2021-03-02	soc/amd/common/blocks/lpc: Explicitly disable serial IRQ	Raul E Rangel
2021-03-01	soc/intel/skylake: Move `gspi_early_bar_init()` call	Angel Pons
2021-03-01	soc/intel: Drop `bootblock_cpu_init()` function	Angel Pons
2021-03-01	soc/intel/cannonlake: Drop unnecessary guard	Angel Pons