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path: root/src/soc
AgeCommit message (Expand)Author
2016-01-19intel/skylake: Adding provision to set voltages to the I2C portsNaresh G Solanki
2016-01-19intel/skylake: Disable SaGv in recovery modeharidhar
2016-01-19soc/braswell: Remove the unneccessary functions from pcie.cShaunak Saha
2016-01-19intel/skylake: Add support for IV feedback loop capture blobSathya Prakash M R
2016-01-18intel/skylake: Change in UPD name from SkipMpInit to FspSkipMpInitBarnali Sarkar
2016-01-18intel/skylake: Remove unused devicetree configuration variablesDuncan Laurie
2016-01-18intel/skylake: provide default VR configurationAaron Durbin
2016-01-18intel/skylake: Add devicetree setting for DDR frequency limit UPDDuncan Laurie
2016-01-18intel/skylake: Add elog event for THERMTRIPDuncan Laurie
2016-01-18header files: Fix guard name comments to match guard namesMartin Roth
2016-01-17intel/skylake: disable heci1 if psf is unlockedArchana Patni
2016-01-17intel/skylake: During RO mode after FSP reset CB lose original stateSubrata Banik
2016-01-16intel/skylake: Fix uninitialized variable warningMartin Roth
2016-01-16intel/skylake: Add kconfig option to skip Native SD ControllerSubrata Banik
2016-01-16intel/skylake: Add VrConfig UPD parameters from corebootRizwan Qureshi
2016-01-16intel/skylake: Enable SkipMpInit tokenRizwan Qureshi
2016-01-15intel/skylake: Init variable so GCC knows it's setMartin Roth
2016-01-15intel/skylake: More UPD params are added for PCH policy in FSPRizwan Qureshi
2016-01-15intel/skylake: Update UPD parameters as per FSP 1.8.0Barnali Sarkar
2016-01-15intel/skylake: Add GPIO ACPI Apis.Subrata Banik
2016-01-15intel/skylake: add nhlt supportAaron Durbin
2016-01-14soc/braswell: Add CPUID for D0 steppingDivya Sasidharan
2016-01-14soc/braswell: Fix P-state tableSubrata Banik
2016-01-14intel/skylake/pcr.c: error out on invalid size in pcr read/writeMartin Roth
2016-01-13tree: drop last paragraph of GPL copyright header from new filesMartin Roth
2016-01-12intel/skylake: Remove check for Microcode loaded by MEMartin Roth
2016-01-08fsp_baytrail: Add additional PCI space above 4GBMartin Roth
2016-01-07intel/braswell: Disable IFD & ME by default so abuild can buildMartin Roth
2016-01-07Correct some common spelling mistakesMartin Roth
2016-01-06intel/braswell: Build in both C0 and 'other' vbiosMartin Roth
2015-12-31imgtec/pistachio: disable default RPU gate register valuesIonela Voinescu
2015-12-31imgtec/pistachio: memlayout: update GRAM sizeIonela Voinescu
2015-12-31imgtec/pistachio: I2C: fix base address for I2C clock setupIonela Voinescu
2015-12-31imgtec/pistachio: identity map SOC registers regionIonela Voinescu
2015-12-31imgtec/pistachio: Add SOC_REGISTERS memory regionIonela Voinescu
2015-12-31imgtec/pistachio: Use SYS PLL in integer modeIonela Voinescu
2015-12-29mips: add coherency argument to identity mappingIonela Voinescu
2015-12-27mainboard/google/urara: change SYS PLL to 700MHzIonela Voinescu
2015-12-27soc/intel/broadwell: Add back support for EHCI debug setupDuncan Laurie
2015-12-27broadwell: Fix SATA Gen3 DTLE configuration registersDuncan Laurie
2015-12-27broadwell: Fix CONFIG_SPI_CONSOLE usageDuncan Laurie
2015-12-26ACPI: Add hack to avoid IASL warning when reading back registersMartin Roth
2015-12-22soc/intel/fsp_baytrail: Make sure i2c bus is < 7Martin Roth
2015-12-21imgtec/pistachio: DDR2, DDR3: DLL reset setIonela Voinescu
2015-12-21imgtec/pistachio: DDR2, DDR3: DQS gate earlyIonela Voinescu
2015-12-21imgtec/pistachio: increase CBFS cacheIonela Voinescu
2015-12-20soc/intel/broadwell: Init var before use, only use when neededMartin Roth
2015-12-17Drop src/cpu/ indirection for MIPSStefan Reinauer
2015-12-17soc/imgtec/pistachio: add implementation for system resetIonela Voinescu
2015-12-17soc/imgtec/pistachio: Implement hard_reset()Stefan Reinauer