coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2017-10-22	soc/intel/cannonlake: Change max root port to 16	Lijian Zhao
2017-10-22	security/vboot: Move vboot2 to security kconfig section	Philipp Deppenwiese
2017-10-22	soc/intel/skylake: pass SataSpeedLimit param to FSP2	Matt DeVillier
2017-10-22	skylake/me: Add debug output of HFST registers	Youness Alaoui
2017-10-22	soc/amd/common: Revert PI blob search hack	Marshall Dawson
2017-10-22	soc/amd/stoneyridge: Remove duplicate macros in pci_devs.h	Chris Ching
2017-10-20	stoneyridge: Add SCI/GPE configuration	Marc Jones
2017-10-20	soc/stoneyridge: Remove _PRW ASL	Marc Jones
2017-10-20	stoneyridge: Fix USB ASL	Marc Jones
2017-10-20	soc/intel/cannonlake: Add platform.asl	Lijian Zhao
2017-10-20	soc/intel/skylake: update GNVS with SGX data	Pratik Prajapati
2017-10-20	soc/intel/apollolake: update GNVS with SGX data	Pratik Prajapati
2017-10-20	intel/common/block/sgx: Add API to enumerate SGX resources and update GNVS	Pratik Prajapati
2017-10-20	soc/intel/skylake: Add GNVS variables and include SGX ASL	Pratik Prajapati
2017-10-20	soc/intel/apollolake: Add GNVS variables and include SGX ASL	Pratik Prajapati
2017-10-20	intel/common/acpi: Add common SGX ASL	Pratik Prajapati
2017-10-20	soc/amd/common: Set AltImageBasePtr to 0	Martin Roth
2017-10-20	Stoney Ridge Platforms: Make AGESA callout tables common	Martin Roth
2017-10-19	soc/amd/stoneyridge: Use macros for PCI_DEVFN calls	Chris Ching
2017-10-19	soc/amd/stoneyridge: Replace magic registers	Richard Spiegel
2017-10-19	soc/intel/cannonlake: Fix HECI error on reset	Lijian Zhao
2017-10-19	soc/intel/cannonlake: Use EBDA structure to store soc reserve memory size	Subrata Banik
2017-10-19	soc/intel/skylake: Use EBDA structure to store soc reserve memory size	Subrata Banik
2017-10-19	soc/intel/cannonlake: Add IGD Support and pre-OS display code	Abhay Kumar
2017-10-19	soc/fsp_broadwell_de: Add support for GPIO handling	Werner Zeh
2017-10-19	soc/intel/skylake: Probe XHCI for wake source for Internal PME	Furquan Shaikh
2017-10-19	soc/intel/skylake: Prevent false logs in pch_xhci_port_wake_check	Furquan Shaikh
2017-10-19	soc/intel/skylake: Define mask for SMI handlers that can be run in SCI mode	Furquan Shaikh
2017-10-19	soc/intel/skylake: Support logging wake source in SMM	Furquan Shaikh
2017-10-19	soc/intel/skylake: Move power_state functions to pmutil.c	Furquan Shaikh
2017-10-19	soc/intel/skylake: Use PCH_DEV_* instead of PCH_DEVFN_*	Furquan Shaikh
2017-10-19	soc/intel/skylake: Use newly added pmc_read_pm1_control	Furquan Shaikh
2017-10-19	soc/intel/apollolake: Use newly added pmc_read_pm1_control	Furquan Shaikh
2017-10-19	soc/intel/common/block/pmc: Add helper routines to read/write PM1_CNT	Furquan Shaikh
2017-10-19	soc/intel/common/block/pmc: Add new function pmc_fill_pm_reg_info	Furquan Shaikh
2017-10-18	soc/intel/cannonlake: Set platform Debug Probe Type	Lijian Zhao
2017-10-18	soc/intel/cannonlake: Update PCIE CLKREQ programing	Lijian Zhao
2017-10-18	soc/intel/cannonlake: Add finalize function	Lijian Zhao
2017-10-18	soc/intel/cannonlake: Calculate soc reserved memory size	Subrata Banik
2017-10-18	soc/intel/cannonlake: Use EBDA area to store cbmem_top address	Subrata Banik
2017-10-18	soc/intel/cannonlake: Refactor memory layout calculation	Subrata Banik
2017-10-18	soc/intel/cannonlake: Create acpi_get_sleep_type() to get previous sleep state	Subrata Banik
2017-10-17	soc/amd/stoneyridge: clean up chip.h	Martin Roth
2017-10-17	soc/intel/common/block/pmc: Move pmc_disable_all_gpe to romstage	Furquan Shaikh
2017-10-16	soc/intel/common: sanity check ebda signature	Aaron Durbin
2017-10-16	console/flashconsole: Enable support for postcar	Youness Alaoui
2017-10-16	src/soc/skylake: Fix Null pointer dereferences	Shaunak Saha
2017-10-16	intel/common: CAR setup CQOS	Naresh G Solanki
2017-10-16	soc/amd/common: Clean up file includes	Frank Vibrans
2017-10-16	soc/amd/stoneyridge: Check UART index	Marshall Dawson