coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-12-17	azalia: Make `set_bits` function non-static	Angel Pons
2020-12-17	soc/intel/cannonlake: Change mainboard_silicon_init_params argument	Patrick Rudolph
2020-12-17	drivers: Replace set_vbe_mode_info_valid	Patrick Rudolph
2020-12-16	soc/amd/picasso: Fix the typo in GPIO define	Zheng Bao
2020-12-16	soc/intel/xeon_sp: Move DMICTL lock	Arthur Heymans
2020-12-16	soc/amd/common/gpio_banks: Drop underscore in __gpio	Kyösti Mälkki
2020-12-16	soc/mediatek/mt8192: Do the dramc pinmux selection	Huayang Duan
2020-12-16	soc/intel/broadwell: Drop unnecessary `sa_dev`	Angel Pons
2020-12-16	arch/x86: Clean up bootblock assembly	Kyösti Mälkki
2020-12-16	soc/mediatek/mt8192: Correct return value of VM18 voltage	Hsin-Hsiung Wang
2020-12-16	soc/mediatek/mt8192: Keep CONN MCU in reset state	Weiyi Lu
2020-12-16	soc/mediatek/mt8192: Do dramc init settings	Huayang Duan
2020-12-16	soc/amd/common: Use only byte access for IOMUX	Kyösti Mälkki
2020-12-16	soc/mediatek/mt8192: Enable DCM	mtk15698
2020-12-16	soc/mediatek/mt8192: ufs: Disable reference clock	Wenbin Mei
2020-12-16	soc/mediatek/mt8192: Initialize audio pll tuner frequency	Weiyi Lu
2020-12-15	soc/amd/picasso/smi: add missing bits to GEVENT_MASK	Felix Held
2020-12-15	soc/amd/common,picasso: Place some ENV_X86 guards	Kyösti Mälkki
2020-12-15	soc/amd/common: Move lpc_util to verstage_x86	Kyösti Mälkki
2020-12-15	soc/amd/common: Redo ACPIMMIO_BASE and _BANK	Kyösti Mälkki
2020-12-15	soc/amd/common: Refactor SMBus base arguments	Kyösti Mälkki
2020-12-15	soc/intel/xeon_sp: Fix final MTRR usage	Arthur Heymans
2020-12-15	soc/mediatek/mt8192: Define DRAM registers and APIs	Huayang Duan
2020-12-14	src/soc/intel: Add support for CAR_HAS_SF_MASKS and select for TGL	Shreesh Chhabbi
2020-12-14	soc/intel: Remove INTEL_CAR_NEM_ENHANCED_V2 config option	Shreesh Chhabbi
2020-12-14	soc/intel/tigerlake: Enable CSE Lite driver for TGL platform in romstage	Sridhar Siricilla
2020-12-14	soc/intel/jasperlake: Enables CSE Lite driver for JSL platform in the romstage	Sridhar Siricilla
2020-12-14	soc/intel/common: Move CSE Lite driver functionality into romstage	Sridhar Siricilla
2020-12-14	soc/inte/common: Replace #if macro with if C-language constuct	Sridhar Siricilla
2020-12-14	soc/intel/common: Check sizes of CSE CBFS RW blob and CSE RW BP	Sridhar Siricilla
2020-12-14	soc/intel/braswell: Use Kconfig value for TSEG size	Angel Pons
2020-12-14	soc/intel/braswell: Clean up devicetree settings	Angel Pons
2020-12-14	soc/intel/skylake: Drop always-zero ProbelessTrace dt setting	Angel Pons
2020-12-14	soc/intel/skylake: Drop always-zero PowerLimit4 dt setting	Angel Pons
2020-12-14	soc/intel/skylake: Drop never-set DdrFreqLimit dt setting	Angel Pons
2020-12-14	soc/intel/xeon_sp/skx: Hook up microcode blob	Arthur Heymans
2020-12-14	soc/intel/skylake: Drop unreferenced PttSwitch dt setting	Angel Pons
2020-12-14	soc/intel/skylake: Drop unreferenced devicetree settings	Angel Pons
2020-12-14	soc/intel/xeon_sp: Configure DPR on all stacks	Arthur Heymans
2020-12-14	drivers: Replace multiple fill_lb_framebuffer with single instance	Patrick Rudolph
2020-12-14	soc/intel/tigerlake: Drop unreferenced devicetree settings	Angel Pons
2020-12-14	soc/intel/jasperlake: Drop unreferenced devicetree settings	Angel Pons
2020-12-14	soc/intel/icelake: Drop unreferenced devicetree settings	Angel Pons
2020-12-14	soc/intel/elkhartlake: Drop unreferenced devicetree settings	Angel Pons
2020-12-14	soc/intel/cannonlake: Drop unreferenced devicetree settings	Angel Pons
2020-12-14	soc/intel/alderlake: Drop unreferenced devicetree settings	Angel Pons
2020-12-14	intel/common/block/lpc: Add new device IDs for Emmitsburg PCH	Jonathan Zhang
2020-12-14	soc/intel/elkhartlake: Update IRQ routing settings	Tan, Lean Sheng
2020-12-14	soc/intel/elkhartlake: Update USB & PCIe devices in ASL files	Tan, Lean Sheng
2020-12-14	soc/intel/elkhartlake: Update USB_PORT_MID pin settings	Tan, Lean Sheng