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coreboot
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Some coreboot project code with my work
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Age
Commit message (
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Author
2018-11-19
northbridge/intel/fsp_*: Remove legacy SoCs
zaolin
2018-06-14
src: Get rid of unneeded whitespace
Elyes HAOUAS
2018-05-09
src/southbridge: Serialize methods with named objects inside
Martin Roth
2015-12-10
ACPI: Fix IASL Warning about unused method for _TZ checks
Martin Roth
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-22
Revert "Remove sandybridge and ivybridge FSP code path"
Martin Roth
2015-10-03
Remove sandybridge and ivybridge FSP code path
Alexandru Gagniuc
2015-05-21
Kill ENABLE_TPM.
Vladimir Serbinenko
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2014-11-25
intel: Remove IRQ1 from possible PIRQ assignemnt.
Vladimir Serbinenko
2014-10-18
fsp_sandybridge: Move to per-device ACPI.
Vladimir Serbinenko
2014-07-17
southbridge,ASL: Trivial - drop trailing blank lines at EOF
Edward O'Callaghan
2014-04-11
intel/*bd82x6x/acpi/pch.asl: Correct name of field unit to GP03
Paul Menzel
2013-12-04
Add Intel FSP bd82x6x southbridge support
Marc Jones