coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-01	sb/intel/ibexpeak: Fix 16-bit read/write PCI_COMMAND register	Elyes HAOUAS
2020-04-05	Drop explicit NULL initializations from `device_operations`	Elyes HAOUAS
2020-04-04	src/southbridge: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-20	sb/ibexpeak: Use macros instead of hard-coded IDs	Felix Singer
2020-03-17	src (minus soc and mainboard): Remove copyright notices	Patrick Georgi
2019-03-21	{northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()	Subrata Banik
2019-03-04	device/mmio.h: Add include file for MMIO ops	Kyösti Mälkki
2019-01-07	src: Use "foo bar" instead of "foo bar"	Elyes HAOUAS
2018-06-21	Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location"	Arthur Heymans
2018-05-18	sb/intel/ibexpeak: Get rid of device_t	Elyes HAOUAS
2018-02-27	sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location	Arthur Heymans
2016-08-31	src/southbridge: Code formating	Elyes HAOUAS
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-02-15	x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer	Kevin Paul Herbert
2014-09-13	azalia: Shrink boilerplate	Vladimir Serbinenko
2014-07-08	southbridge: Trivial - drop trailing blank lines at EOF	Edward O'Callaghan
2014-02-17	ibexpeak/azalia: Remove C4-register extended init.	Vladimir Serbinenko
2013-12-03	ibexpeak: ensure config compatibility with bd82x6x	Vladimir Serbinenko
2013-11-25	Support for Ibexpeak southbridge	Vladimir Serbinenko
2013-06-13	Revert "Add support for Intel Ibex Peak (Mobile 5) southbridge"	Stefan Reinauer
2013-06-12	Add support for Intel Ibex Peak (Mobile 5) southbridge	Stefan Reinauer