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path: root/src/southbridge/intel/ibexpeak/smbus.c
AgeCommit message (Expand)Author
2021-04-11sb/intel/x/smbus.c: Correct register access widthAngel Pons
2020-12-11sb/intel/x/smbus.c: Factor out common codeAngel Pons
2020-12-10sb/intel/x/smbus.c: Add block read/write supportAngel Pons
2020-12-10sb/intel/x/smbus.c: Rename parameterAngel Pons
2020-10-20sb/intel/ibexpeak: Align to coreboot's coding styleAngel Pons
2020-08-17src: Use PCI_BASE_ADDRESS_* macros instead of magic numbersElyes HAOUAS
2020-07-20sb/intel: Define CONFIG_FIXED_SMBUS_IO_BASEAngel Pons
2020-06-06src: Use pci_dev_ops_pci where applicableAngel Pons
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-04-04src/southbridge: Use SPDX for GPL-2.0-only filesAngel Pons
2020-03-20sb/ibexpeak: Use macros instead of hard-coded IDsFelix Singer
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2020-01-09sb/intel/common: Add smbus_set_slave_addr()Kyösti Mälkki
2020-01-09device,sb/intel: Move SMBus host controller prototypesKyösti Mälkki
2019-03-21{northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem()Subrata Banik
2018-11-16src: Remove unneeded include <console/console.h>Elyes HAOUAS
2018-05-18sb/intel/ibexpeak: Get rid of device_tElyes HAOUAS
2017-08-06sb/intel/*: Use common SMBus functionsArthur Heymans
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-06-04devicetree: Discriminate device ops scan_bus()Kyösti Mälkki
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2014-02-01ibexpeak: add smbus_write_byteVladimir Serbinenko
2013-11-25Support for Ibexpeak southbridgeVladimir Serbinenko
2013-06-13Revert "Add support for Intel Ibex Peak (Mobile 5) southbridge"Stefan Reinauer
2013-06-12Add support for Intel Ibex Peak (Mobile 5) southbridgeStefan Reinauer