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AgeCommit message (Expand)Author
2020-08-25vendorcode/intel/fsp: Add Jasper Lake FSP headers for FSP v2295Ronak Kanabar
2020-08-24vc/google/chromeos: load wifi_sar_defaults.hex as the main WiFi SAR CBFS sourceKevin Chiu
2020-08-24nb/amd/agesa: define DDR3_SPD_SIZE as a common valueMike Banon
2020-08-24edk2-stable202005/IntelFsp2Pkg: Add FSP*_ARCH_UPD.Ronak Kanabar
2020-08-23vc/amd/fsp/picasso: add FSP-M UPD to disable the HD Audio controllerFelix Held
2020-08-23Revert "vc/amd/fsp/picasso: add FSP-M UPD to disable the SATA controller"Felix Held
2020-08-22vendorcode/google/chromeos: Introduce helper for CSE board resetKarthikeyan Ramasubramanian
2020-08-20vc/amd/agesa/f16kb: raise the UDIMM Freq limit 1333MT/s values to 1600MT/sMike Banon
2020-08-19vc/amd/fsp/picasso: update pci descriptor commentsMatt Papageorge
2020-08-17vc/amd/agesa/f15tn: add 933 MHz to GfxMemClockFrequencyDefinitionTableMike Banon
2020-08-17vc/amd/fsp/picasso: add FSP-M UPD to disable the SATA controllerFelix Held
2020-08-14vendercode/intel/fsp/fsp2_0/glk: Update FSP header file per v2.2.0Seunghwan Kim
2020-08-13vc/amd/picasso/bl_uapp: Update header fileMarshall Dawson
2020-08-13vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3313Srinidhi N Kaushik
2020-08-11vendorcode/intel/fsp/fsp2_0/CPX-SP: remove non-existing PSTACKsJonathan Zhang
2020-08-08vendorcode/intel/fsp/fsp2_0/CPX-SP: update to ww32 release and adapt socJonathan Zhang
2020-08-05vendorcode/amd/fsp/picasso Fix type 17 smbios misalignmentJason Glenesk
2020-08-02vc/amd/fsp/picasso: document requirements for DXIO PCIe port assignmentsFelix Held
2020-07-31vc/amd/fsp/picasso: document DXIO lane number mappingFelix Held
2020-07-30vc/amd/picasso/bl_uapp: Update header fileMarshall Dawson
2020-07-28vc/cavium: Fix up license headersAngel Pons
2020-07-26amd/picasso: rework USB2 PHY tune parameter handlingFelix Held
2020-07-24vc/amd/fsp/picasso: update UPD headerFelix Held
2020-07-23amd/picasso: rename PCIe descriptor to DXIO descriptorFelix Held
2020-07-23vc/amd/fsp/picasso: add logical to lane number in port descriptor structFelix Held
2020-07-23soc/intel/xeon_sp/cpx: display SystemMemoryMapHob fieldsJonathan Zhang
2020-07-22vc/amd/fsp/picasso: mark remaining UPD header structs as __packedFelix Held
2020-07-20vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3274Srinidhi N Kaushik
2020-07-15amd/picasso: rework DXIO and DDI UPD handlingFelix Held
2020-07-15vc/amd/fsp/picasso: replace #pragma pack(1) with __packed attributeFelix Held
2020-07-12soc/intel/xeon_sp/cpx: use HOB_TYPE_GUID_EXTENSION to interpret platform HOBsJonathan Zhang
2020-07-12vc/amd/fsp/picasso: add DMI data structure definitionsAaron Durbin
2020-07-12vendocode/intel/fsp/fsp2_0/cpx_sp: Update to FSP ww28 release and adapt socJonathan Zhang
2020-07-10vc/amd/pi/00660F01: Drop dead codeAngel Pons
2020-07-09vc/amd/agesa/f15tn: Drop dead codeAngel Pons
2020-07-09vc/amd/fsp/picasso: add comment on logical lane numbers in descriptorFelix Held
2020-07-07vendorcode/intel/fsp/fsp2_0/cpx_sp: Update to FSP ww26 release and adapt socJonathan Zhang
2020-07-06vendorcode/intel/fsp: Add Jasper Lake FSP headers for FSP v2194Ronak Kanabar
2020-06-30ACPI: Drop typedef global_nvs_tKyösti Mälkki
2020-06-28vendorcode/intel/fsp/fsp2_0/cpx_sp: Update to FSP ww24 release and adapt socJonathan Zhang
2020-06-25vendorcode/intel: Add edk2-stable202005 supportJonathan Zhang
2020-06-25vendorcode/google/chromeos: Add GOOG0016 _HID for Chrome OS ACPIDuncan Laurie
2020-06-22vc/amd/fsp/picasso: Sync UPD and GUID filesMarshall Dawson
2020-06-21src: Substitute `__FUNCTION__` with `__func__`Angel Pons
2020-06-20vc/google/chromeos/elog.c: Clean up codeAngel Pons
2020-06-20ACPI: Drop some HAVE_ACPI_RESUME preprocessor useKyösti Mälkki
2020-06-19vc/amd/fsp/picasso: Use fixed width fields for platform descriptorsMatt Papageorge
2020-06-19Kconfig: Escape variable to accommodate new Kconfig versionsPatrick Georgi
2020-06-18vendorcode/intel/fsp: Update MemInfoHob header for Jasper LakeAamir Bohra
2020-06-15vc/amd/fsp/picasso: Add AMD code to support psp_verstageMartin Roth
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