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path: root/util/flashrom/chipset_enable.c
AgeCommit message (Expand)Author
2009-06-28This copy of flashrom is old and unmaintained. Delete it to avoidPatrick Georgi
2009-04-15Some coding style and consistency fixes (trivial).Uwe Hermann
2009-02-01 Following patch fixes VIA SPI (VT8237S). It needs to have opcodesRudolf Marek
2009-01-26flashrom: Add VT8237A PCI IDPeter Stuge
2009-01-26flashrom: Abstract mmap() in physmap.c and only open /dev/mem on the first ph...Stefan Reinauer
2009-01-23flashrom: Check all mmap() calls and print helpful Linux error message.Peter Stuge
2009-01-18flashrom: Fix ICH9 locking register address and add important debug output.FENG yu ning
2009-01-07Add AMD-768 chipset support.Sven Schnelle
2009-01-07Add i631x LPC support.Sven Schnelle
2008-12-22flashrom: Initialize ICH SPI opcodes also for ICH9 and later.Peter Stuge
2008-12-15* add a generic preop-opcode-pair table.FENG yu ning
2008-12-08Generates OPCODES struct from the ICH7/ICH9/VIA chipset if its SPIFENG yu ning
2008-12-05flashrom: Add AMD SB700 flash enableNiels Ole Salscheider
2008-12-03Replace #ifdefs for sc520 systems by run time probing.Stefan Reinauer
2008-11-28Add support for the AMD/ATI SB600 southbridge SPI functionality.Jason Wang
2008-11-03Dump ICH8/ICH9/ICH10 SPI registers in flashrom.Carl-Daniel Hailfinger
2008-10-29Enable SPI boot flash support on EP80579, which has the ICH7 register setEd Swierk
2008-10-28Add support for the Intel 82371MX (MPIIX) southbridge (trivial).Uwe Hermann
2008-10-26Add support for the Intel 82371FB PIIX and 82371SB (PIIX3) southbridges.Uwe Hermann
2008-10-25Add support for the VIA VT82C586A/B chipset, improve documentation.Uwe Hermann
2008-10-18Coding-style fixes for flashrom, partly indent-aided (trivial).Uwe Hermann
2008-10-18flashrom: Allow the SiS 620 chipset to detect and read at least 256kb chips.Urja Rannikko
2008-10-15SB600 has four write once LPC ROM protect areas. It is not possible to writeMarc Jones
2008-10-10Add ICH10 support to flashrom.Carl-Daniel Hailfinger
2008-08-20flashrom: Recognize the Intel EP80579 LPC flash interface.Ed Swierk
2008-07-05Adding support for flashing system with Nvidia MCP67Stefan Reinauer
2008-06-30First attempt to clean up SPI probing and create a commonStefan Reinauer
2008-06-30This patch adds support for VIA SPI controller on VT8237S. It is similar withRudolf Marek
2008-06-29flashrom: Fix ICH7 non-SPI that broke in r3393Peter Stuge
2008-06-27* ICH7 SPI supportStefan Reinauer
2008-05-22A bunch of cosmetic improvements (trivial).Uwe Hermann
2008-05-22Changes to make flashrom compile (and work) on FreeBSD.Andriy Gapon
2008-05-16ICH8 and ICH9 have an almost identical SPI interface, only the locationCarl-Daniel Hailfinger
2008-05-16Add support for SPI chips on ICH9. This is done by using the generic SPIDominik Geyer
2008-05-14Add more infrastructure for flashrom ICH9 support.Carl-Daniel Hailfinger
2008-05-14Add the Intel 6300ESB as known chipset to the chipset struct enables.Claus Gindhart
2008-04-29flashrom: Enable ROM decode range to 1MB for vt8237rBari Ari
2008-03-18Add ICH9 detection to flashrom. Straight from the datasheet, untested.Carl-Daniel Hailfinger
2008-03-14Prepare for ICH7/ICH8 SPI support by adding some debugging for allCarl-Daniel Hailfinger
2008-03-13Also print the chip vendor name in --list-supported output (trivial).Uwe Hermann
2008-03-12Add --list-supported option to flashrom which lists the supportedUwe Hermann
2008-02-11flashrom: further cleanups to enable_flash_cs5536Mart Raudsepp
2008-02-08Improve error handling and make RCONF_DEFAULT_MSR address be a constant.Mart Raudsepp
2008-02-08This implements support for devices using AMD Geode companion chipMart Raudsepp
2008-01-26Correctly disable the ROM area Write Protect bit in the Geode LX.Marc Jones
2007-12-04Various coding style fixes, constification, fixed typos (trivial).Uwe Hermann
2007-11-13[LinuxBIOS] flashrom support for AMD Geode CS5536Lane Brooks
2007-10-30Add support for Intel 440MX systems.Uwe Hermann
2007-10-17Some cosmetic cleanups in the flashrom code and output.Uwe Hermann
2007-10-17Fix wrong values/typos in chipset_enable.c. This has been confirmed byCarl-Daniel Hailfinger
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