summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorLeif Lindholm <leif.lindholm@linaro.org>2015-11-20 13:14:59 +0000
committerleiflindholm <leiflindholm@Edk2>2015-11-20 13:14:59 +0000
commit3b1495156a3576992b31a77e799db207cb61d9de (patch)
tree17e1030021a7cf7923d2c0a708e2562d8c7ec97e
parentf73dd6f5bb31aed6097bcb4991fc04b542fc3911 (diff)
downloadedk2-platforms-3b1495156a3576992b31a77e799db207cb61d9de.tar.xz
ArmPkg: ArmLib: purge incorrect ArmDrainWriteBuffer () alias
In ArmLib, there exists an alias for ArmDataSynchronizationBarrier, named after one of several names for the pre-ARMv6 cp15 operation that was formalised into the Data Synchronization Barrier in ARMv6. This alias is also the one called from within ArmLib, in preference of the correct name. Through the power of code reuse, this name slipped into the AArch64 variant as well. Expunge it from the codebase. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18915 6f19259b-4bc3-4df7-8a09-765794883524
-rw-r--r--ArmPkg/Include/Library/ArmLib.h6
-rw-r--r--ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c8
-rw-r--r--ArmPkg/Library/ArmLib/AArch64/AArch64Support.S2
-rw-r--r--ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c8
-rw-r--r--ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S2
-rw-r--r--ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm2
6 files changed, 8 insertions, 20 deletions
diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h
index a328146b69..9622444ec6 100644
--- a/ArmPkg/Include/Library/ArmLib.h
+++ b/ArmPkg/Include/Library/ArmLib.h
@@ -393,12 +393,6 @@ ArmSetHighVectors (
VOID
EFIAPI
-ArmDrainWriteBuffer (
- VOID
- );
-
-VOID
-EFIAPI
ArmDataMemoryBarrier (
VOID
);
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
index dec125f248..ec35097b40 100644
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c
@@ -33,7 +33,7 @@ AArch64DataCacheOperation (
AArch64AllDataCachesOperation (DataCacheOperation);
- ArmDrainWriteBuffer ();
+ ArmDataSynchronizationBarrier ();
if (SavedInterruptState) {
ArmEnableInterrupts ();
@@ -46,7 +46,7 @@ ArmInvalidateDataCache (
VOID
)
{
- ArmDrainWriteBuffer ();
+ ArmDataSynchronizationBarrier ();
AArch64DataCacheOperation (ArmInvalidateDataCacheEntryBySetWay);
}
@@ -56,7 +56,7 @@ ArmCleanInvalidateDataCache (
VOID
)
{
- ArmDrainWriteBuffer ();
+ ArmDataSynchronizationBarrier ();
AArch64DataCacheOperation (ArmCleanInvalidateDataCacheEntryBySetWay);
}
@@ -66,6 +66,6 @@ ArmCleanDataCache (
VOID
)
{
- ArmDrainWriteBuffer ();
+ ArmDataSynchronizationBarrier ();
AArch64DataCacheOperation (ArmCleanDataCacheEntryBySetWay);
}
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
index df2dc935c1..c530d19e89 100644
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
@@ -26,7 +26,6 @@ GCC_ASM_EXPORT (ArmCleanInvalidateDataCacheEntryByMVA)
GCC_ASM_EXPORT (ArmInvalidateDataCacheEntryBySetWay)
GCC_ASM_EXPORT (ArmCleanDataCacheEntryBySetWay)
GCC_ASM_EXPORT (ArmCleanInvalidateDataCacheEntryBySetWay)
-GCC_ASM_EXPORT (ArmDrainWriteBuffer)
GCC_ASM_EXPORT (ArmEnableMmu)
GCC_ASM_EXPORT (ArmDisableMmu)
GCC_ASM_EXPORT (ArmDisableCachesAndMmu)
@@ -364,7 +363,6 @@ ASM_PFX(ArmDataMemoryBarrier):
ASM_PFX(ArmDataSynchronizationBarrier):
-ASM_PFX(ArmDrainWriteBuffer):
dsb sy
ret
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c
index b53f455bfa..23a7f2f2bb 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c
@@ -32,7 +32,7 @@ ArmV7DataCacheOperation (
ArmV7AllDataCachesOperation (DataCacheOperation);
- ArmDrainWriteBuffer ();
+ ArmDataSynchronizationBarrier ();
if (SavedInterruptState) {
ArmEnableInterrupts ();
@@ -45,7 +45,7 @@ ArmInvalidateDataCache (
VOID
)
{
- ArmDrainWriteBuffer ();
+ ArmDataSynchronizationBarrier ();
ArmV7DataCacheOperation (ArmInvalidateDataCacheEntryBySetWay);
}
@@ -55,7 +55,7 @@ ArmCleanInvalidateDataCache (
VOID
)
{
- ArmDrainWriteBuffer ();
+ ArmDataSynchronizationBarrier ();
ArmV7DataCacheOperation (ArmCleanInvalidateDataCacheEntryBySetWay);
}
@@ -65,6 +65,6 @@ ArmCleanDataCache (
VOID
)
{
- ArmDrainWriteBuffer ();
+ ArmDataSynchronizationBarrier ();
ArmV7DataCacheOperation (ArmCleanDataCacheEntryBySetWay);
}
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
index 7366eee6dc..5f030d92de 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
@@ -23,7 +23,6 @@ GCC_ASM_EXPORT (ArmCleanInvalidateDataCacheEntryByMVA)
GCC_ASM_EXPORT (ArmInvalidateDataCacheEntryBySetWay)
GCC_ASM_EXPORT (ArmCleanDataCacheEntryBySetWay)
GCC_ASM_EXPORT (ArmCleanInvalidateDataCacheEntryBySetWay)
-GCC_ASM_EXPORT (ArmDrainWriteBuffer)
GCC_ASM_EXPORT (ArmEnableMmu)
GCC_ASM_EXPORT (ArmDisableMmu)
GCC_ASM_EXPORT (ArmDisableCachesAndMmu)
@@ -261,7 +260,6 @@ ASM_PFX(ArmDataMemoryBarrier):
bx LR
ASM_PFX(ArmDataSynchronizationBarrier):
-ASM_PFX(ArmDrainWriteBuffer):
dsb
bx LR
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm
index 78a12e1629..542157bef7 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm
@@ -20,7 +20,6 @@
EXPORT ArmInvalidateDataCacheEntryBySetWay
EXPORT ArmCleanDataCacheEntryBySetWay
EXPORT ArmCleanInvalidateDataCacheEntryBySetWay
- EXPORT ArmDrainWriteBuffer
EXPORT ArmEnableMmu
EXPORT ArmDisableMmu
EXPORT ArmDisableCachesAndMmu
@@ -255,7 +254,6 @@ ArmDataMemoryBarrier
bx LR
ArmDataSynchronizationBarrier
-ArmDrainWriteBuffer
dsb
bx LR