diff options
| author | Jordan Justen <jordan.l.justen@intel.com> | 2016-05-30 18:52:01 -0700 |
|---|---|---|
| committer | Liming Gao <liming.gao@intel.com> | 2016-06-28 09:49:36 +0800 |
| commit | 464e84f88e606375dcb298ce082056cf0d615ce3 (patch) | |
| tree | d76d36c5262d5c3ba884fe68d2361263d65a3298 | |
| parent | 079f75d59477a3f366458c4de8f93e6f4c8f104f (diff) | |
| download | edk2-platforms-464e84f88e606375dcb298ce082056cf0d615ce3.tar.xz | |
MdePkg BaseLib: Convert X64/DisablePaging64.asm to NASM
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
X64/DisablePaging64.asm to X64/DisablePaging64.nasm
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
| -rw-r--r-- | MdePkg/Library/BaseLib/BaseLib.inf | 3 | ||||
| -rw-r--r-- | MdePkg/Library/BaseLib/X64/DisablePaging64.nasm | 84 |
2 files changed, 87 insertions, 0 deletions
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf index 639707be90..4ad9451774 100644 --- a/MdePkg/Library/BaseLib/BaseLib.inf +++ b/MdePkg/Library/BaseLib/BaseLib.inf @@ -463,6 +463,7 @@ X64/Invd.asm | MSFT
X64/Wbinvd.nasm| MSFT
X64/Wbinvd.asm | MSFT
+ X64/DisablePaging64.nasm| MSFT
X64/DisablePaging64.asm | MSFT
X64/Mwait.asm | MSFT
X64/Monitor.asm | MSFT
@@ -544,6 +545,7 @@ X64/Invd.asm | INTEL
X64/Wbinvd.nasm| INTEL
X64/Wbinvd.asm | INTEL
+ X64/DisablePaging64.nasm| INTEL
X64/DisablePaging64.asm | INTEL
X64/Mwait.asm | INTEL
X64/Monitor.asm | INTEL
@@ -634,6 +636,7 @@ X64/LongJump.S | GCC
X64/EnableDisableInterrupts.nasm| GCC
X64/EnableDisableInterrupts.S | GCC
+ X64/DisablePaging64.nasm| GCC
X64/DisablePaging64.S | GCC
X64/CpuId.nasm| GCC
X64/CpuId.S | GCC
diff --git a/MdePkg/Library/BaseLib/X64/DisablePaging64.nasm b/MdePkg/Library/BaseLib/X64/DisablePaging64.nasm new file mode 100644 index 0000000000..144176be65 --- /dev/null +++ b/MdePkg/Library/BaseLib/X64/DisablePaging64.nasm @@ -0,0 +1,84 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DisablePaging64.Asm
+;
+; Abstract:
+;
+; AsmDisablePaging64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ DEFAULT REL
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; InternalX86DisablePaging64 (
+; IN UINT16 Cs,
+; IN UINT32 EntryPoint,
+; IN UINT32 Context1, OPTIONAL
+; IN UINT32 Context2, OPTIONAL
+; IN UINT32 NewStack
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalX86DisablePaging64)
+ASM_PFX(InternalX86DisablePaging64):
+ cli
+ lea rsi, [.0] ; rsi <- The start address of transition code
+ mov edi, [rsp + 0x28] ; rdi <- New stack
+ lea rax, [mTransitionEnd] ; rax <- end of transition code
+ sub rax, rsi ; rax <- The size of transition piece code
+ add rax, 4 ; Round RAX up to the next 4 byte boundary
+ and al, 0xfc
+ sub rdi, rax ; rdi <- Use stack to hold transition code
+ mov r10d, edi ; r10 <- The start address of transicition code below 4G
+ push rcx ; save rcx to stack
+ mov rcx, rax ; rcx <- The size of transition piece code
+ rep movsb ; copy transition code to top of new stack which must be below 4GB
+ pop rcx ; restore rcx
+
+ mov esi, r8d
+ mov edi, r9d
+ mov eax, r10d ; eax <- start of the transition code on the stack
+ sub eax, 4 ; eax <- One slot below transition code on the stack
+ push rcx ; push Cs to stack
+ push r10 ; push address of tansition code on stack
+ DB 0x48 ; prefix to composite "retq" with next "retf"
+ retf ; Use far return to load CS register from stack
+
+; Start of transition code
+.0:
+ mov esp, eax ; set up new stack
+ mov rax, cr0
+ btr eax, 31 ; Clear CR0.PG
+ mov cr0, rax ; disable paging and caches
+
+ mov ebx, edx ; save EntryPoint to rbx, for rdmsr will overwrite rdx
+ mov ecx, 0xc0000080
+ rdmsr
+ and ah, ~ 1 ; clear LME
+ wrmsr
+ mov rax, cr4
+ and al, ~ (1 << 5) ; clear PAE
+ mov cr4, rax
+ push rdi ; push Context2
+ push rsi ; push Context1
+ call rbx ; transfer control to EntryPoint
+ hlt ; no one should get here
+
+mTransitionEnd:
+
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