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authorJan D?bro? <jsd@semihalf.com>2016-06-21 08:37:06 +0800
committerFeng Tian <feng.tian@intel.com>2016-06-22 16:23:58 +0800
commit5e90aa1e207344723b28dd87bb5af14a0a775494 (patch)
tree72dba9a3fa6dc18410691e3f25c7905d432051b3
parent59e2626181051dec0068bc4fcce9a88b9c8f084e (diff)
downloadedk2-platforms-5e90aa1e207344723b28dd87bb5af14a0a775494.tar.xz
MdedulePkg: AtaAtapiPassThru: Remove polling on PxCMD.FR flag setting
It is enough to set PxCMD.FRE bit, which cause HBA to post received FISes into the FIS receive area. According to AHCI Specification, only polling on PxCMD.FRE to be cleared is necessary, when it is needeed to stop FIS engine (eg. in order to change PxCMD.FB address). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jan Dabros <jsd@semihalf.com> Signed-off-by: Marcin Wojtas <mw@semihalf.com> Reviewed-by: Feng Tian <feng.tian@intel.com>
-rw-r--r--MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c18
1 files changed, 1 insertions, 17 deletions
diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
index 3534d9fc23..469a40ac39 100644
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
@@ -427,13 +427,7 @@ AhciEnableFisReceive (
Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CMD;
AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_CMD_FRE);
- return AhciWaitMmioSet (
- PciIo,
- Offset,
- EFI_AHCI_PORT_CMD_FR,
- EFI_AHCI_PORT_CMD_FR,
- Timeout
- );
+ return EFI_SUCCESS;
}
/**
@@ -2344,16 +2338,6 @@ AhciModeInitialization (
//
Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CMD;
AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_CMD_FRE);
- Status = AhciWaitMmioSet (
- PciIo,
- Offset,
- EFI_AHCI_PORT_CMD_FR,
- EFI_AHCI_PORT_CMD_FR,
- EFI_AHCI_PORT_CMD_FR_CLEAR_TIMEOUT
- );
- if (EFI_ERROR (Status)) {
- continue;
- }
//
// Wait no longer than 10 ms to wait the Phy to detect the presence of a device.