diff options
| author | Star Zeng <star.zeng@intel.com> | 2016-07-20 10:24:58 +0800 |
|---|---|---|
| committer | Michael Kinney <michael.d.kinney@intel.com> | 2016-09-01 08:18:59 -0700 |
| commit | b10d5ddc0385f39d2c2c62843710b7609a4ca169 (patch) | |
| tree | 7605bf91cf3b1fa5c05464028f60190db554467a | |
| parent | 0bdc9e75c0c31d5a508eac9353b2079f46b23f2f (diff) | |
| download | edk2-platforms-b10d5ddc0385f39d2c2c62843710b7609a4ca169.tar.xz | |
UefiCpuPkg/PiSmmCpuDxeSmm: Consume PcdAcpiS3Enable to control the code
if PcdAcpiS3Enable is disabled, then skip S3 related logic.
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
| -rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 26 | ||||
| -rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 1 | ||||
| -rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 9 | ||||
| -rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf | 1 |
4 files changed, 37 insertions, 0 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c index f26149d27a..6a798ef899 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c @@ -75,6 +75,8 @@ BOOLEAN mSmmS3Flag = FALSE; //
SMM_S3_RESUME_STATE *mSmmS3ResumeState = NULL;
+BOOLEAN mAcpiS3Enable = TRUE;
+
/**
Get MSR spin lock by MSR index.
@@ -548,6 +550,10 @@ RestoreSmmConfigurationInS3 ( VOID
)
{
+ if (!mAcpiS3Enable) {
+ return;
+ }
+
//
// Restore SMM Configuration in S3 boot path.
//
@@ -726,6 +732,10 @@ InitSmmS3ResumeState ( EFI_SMRAM_DESCRIPTOR *SmramDescriptor;
SMM_S3_RESUME_STATE *SmmS3ResumeState;
+ if (!mAcpiS3Enable) {
+ return;
+ }
+
GuidHob = GetFirstGuidHob (&gEfiAcpiVariableGuid);
if (GuidHob != NULL) {
SmramDescriptor = (EFI_SMRAM_DESCRIPTOR *) GET_GUID_HOB_DATA (GuidHob);
@@ -817,6 +827,10 @@ GetAcpiCpuData ( IA32_DESCRIPTOR *Gdtr;
IA32_DESCRIPTOR *Idtr;
+ if (!mAcpiS3Enable) {
+ return;
+ }
+
//
// Prevent use of mAcpiCpuData by initialize NumberOfCpus to 0
//
@@ -883,3 +897,15 @@ GetAcpiCpuData ( CopyMem (mIdtForAp, (VOID *)Idtr->Base, Idtr->Limit + 1);
CopyMem (mMachineCheckHandlerForAp, (VOID *)(UINTN)mAcpiCpuData.ApMachineCheckHandlerBase, mAcpiCpuData.ApMachineCheckHandlerSize);
}
+
+/**
+ Get ACPI S3 enable flag.
+
+**/
+VOID
+GetAcpiS3EnableFlag (
+ VOID
+ )
+{
+ mAcpiS3Enable = PcdGetBool (PcdAcpiS3Enable);
+}
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c index d00afc8ce6..852b5c7426 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c @@ -910,6 +910,7 @@ PiCpuSmmEntry ( //
InitSmmProfile (Cr3);
+ GetAcpiS3EnableFlag ();
InitSmmS3ResumeState (Cr3);
DEBUG ((EFI_D_INFO, "SMM CPU Module exit from SMRAM with EFI_SUCCESS\n"));
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h index 97309d1fe7..9b119c8412 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h @@ -816,4 +816,13 @@ RestoreSmmConfigurationInS3 ( VOID
);
+/**
+ Get ACPI S3 enable flag.
+
+**/
+VOID
+GetAcpiS3EnableFlag (
+ VOID
+ );
+
#endif
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf index d7e6e0745a..5d598d609c 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf @@ -153,6 +153,7 @@ gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugDataAddress ## SOMETIMES_PRODUCES
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmCodeAccessCheckEnable ## CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode ## CONSUMES
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiS3Enable ## CONSUMES
[Depex]
gEfiMpServiceProtocolGuid
|