diff options
author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2015-11-09 13:25:50 +0000 |
---|---|---|
committer | abiesheuvel <abiesheuvel@Edk2> | 2015-11-09 13:25:50 +0000 |
commit | cf93a37859e6d06efdbc5b1a91a6bf66f06b578b (patch) | |
tree | cd6baf791ea1dc9c5b2a49ba6d2f2c8ab2d9d39e | |
parent | 417165735efba79b7d908d8e5125a7cf6797e26d (diff) | |
download | edk2-platforms-cf93a37859e6d06efdbc5b1a91a6bf66f06b578b.tar.xz |
ArmPkg BeagleBoardPkg Omap35xxPkg: fix typo 'ArmDataSyncronizationBarrier'
Replace all instances of ArmDataSyncronizationBarrier with
ArmDataSynchronizationBarrier.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18751 6f19259b-4bc3-4df7-8a09-765794883524
-rw-r--r-- | ArmPkg/Include/Library/ArmLib.h | 2 | ||||
-rw-r--r-- | ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | 4 | ||||
-rw-r--r-- | ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S | 4 | ||||
-rw-r--r-- | ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm | 4 | ||||
-rwxr-xr-x | BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoard.c | 4 | ||||
-rw-r--r-- | Omap35xxPkg/InterruptDxe/HardwareInterrupt.c | 6 | ||||
-rwxr-xr-x | Omap35xxPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.c | 2 |
7 files changed, 13 insertions, 13 deletions
diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h index b4768841bd..58116663b2 100644 --- a/ArmPkg/Include/Library/ArmLib.h +++ b/ArmPkg/Include/Library/ArmLib.h @@ -483,7 +483,7 @@ ArmDataMemoryBarrier ( VOID
EFIAPI
-ArmDataSyncronizationBarrier (
+ArmDataSynchronizationBarrier (
VOID
);
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S index 28cf27fbd1..8b5e0fb6e7 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S @@ -42,7 +42,7 @@ GCC_ASM_EXPORT (ArmDisableBranchPrediction) GCC_ASM_EXPORT (AArch64AllDataCachesOperation)
GCC_ASM_EXPORT (AArch64PerformPoUDataCacheOperation)
GCC_ASM_EXPORT (ArmDataMemoryBarrier)
-GCC_ASM_EXPORT (ArmDataSyncronizationBarrier)
+GCC_ASM_EXPORT (ArmDataSynchronizationBarrier)
GCC_ASM_EXPORT (ArmInstructionSynchronizationBarrier)
GCC_ASM_EXPORT (ArmWriteVBar)
GCC_ASM_EXPORT (ArmReadVBar)
@@ -389,7 +389,7 @@ ASM_PFX(ArmDataMemoryBarrier): ret
-ASM_PFX(ArmDataSyncronizationBarrier):
+ASM_PFX(ArmDataSynchronizationBarrier):
ASM_PFX(ArmDrainWriteBuffer):
dsb sy
ret
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S index af5ec23a1a..f59cd5f32e 100644 --- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S +++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S @@ -40,7 +40,7 @@ GCC_ASM_EXPORT (ArmSetHighVectors) GCC_ASM_EXPORT (ArmV7AllDataCachesOperation)
GCC_ASM_EXPORT (ArmV7PerformPoUDataCacheOperation)
GCC_ASM_EXPORT (ArmDataMemoryBarrier)
-GCC_ASM_EXPORT (ArmDataSyncronizationBarrier)
+GCC_ASM_EXPORT (ArmDataSynchronizationBarrier)
GCC_ASM_EXPORT (ArmInstructionSynchronizationBarrier)
GCC_ASM_EXPORT (ArmReadVBar)
GCC_ASM_EXPORT (ArmWriteVBar)
@@ -321,7 +321,7 @@ ASM_PFX(ArmDataMemoryBarrier): dmb
bx LR
-ASM_PFX(ArmDataSyncronizationBarrier):
+ASM_PFX(ArmDataSynchronizationBarrier):
ASM_PFX(ArmDrainWriteBuffer):
dsb
bx LR
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm index 2b13811dc6..07ff1ae15a 100644 --- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm +++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm @@ -37,7 +37,7 @@ EXPORT ArmV7AllDataCachesOperation
EXPORT ArmV7PerformPoUDataCacheOperation
EXPORT ArmDataMemoryBarrier
- EXPORT ArmDataSyncronizationBarrier
+ EXPORT ArmDataSynchronizationBarrier
EXPORT ArmInstructionSynchronizationBarrier
EXPORT ArmReadVBar
EXPORT ArmWriteVBar
@@ -315,7 +315,7 @@ ArmDataMemoryBarrier dmb
bx LR
-ArmDataSyncronizationBarrier
+ArmDataSynchronizationBarrier
ArmDrainWriteBuffer
dsb
bx LR
diff --git a/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoard.c b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoard.c index dbbe68a7a0..3b02440048 100755 --- a/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoard.c +++ b/BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoard.c @@ -92,11 +92,11 @@ ArmPlatformInitialize ( // Turn off the functional clock for Timer 3
MmioAnd32 (CM_FCLKEN_PER, 0xFFFFFFFF ^ CM_ICLKEN_PER_EN_GPT3_ENABLE );
- ArmDataSyncronizationBarrier ();
+ ArmDataSynchronizationBarrier ();
// Clear IRQs
MmioWrite32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWIRQAGR);
- ArmDataSyncronizationBarrier ();
+ ArmDataSynchronizationBarrier ();
return RETURN_SUCCESS;
}
diff --git a/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c b/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c index e9d84aeabb..09e22b5921 100644 --- a/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c +++ b/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c @@ -237,7 +237,7 @@ EndOfInterrupt ( )
{
MmioWrite32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWIRQAGR);
- ArmDataSyncronizationBarrier ();
+ ArmDataSynchronizationBarrier ();
return EFI_SUCCESS;
}
@@ -267,7 +267,7 @@ IrqInterruptHandler ( // Needed to prevent infinite nesting when Time Driver lowers TPL
MmioWrite32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWIRQAGR);
- ArmDataSyncronizationBarrier ();
+ ArmDataSynchronizationBarrier ();
InterruptHandler = gRegisteredInterruptHandlers[Vector];
if (InterruptHandler != NULL) {
@@ -277,7 +277,7 @@ IrqInterruptHandler ( // Needed to clear after running the handler
MmioWrite32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWIRQAGR);
- ArmDataSyncronizationBarrier ();
+ ArmDataSynchronizationBarrier ();
}
//
diff --git a/Omap35xxPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.c b/Omap35xxPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.c index de849d4fd6..11f0bdd117 100755 --- a/Omap35xxPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.c +++ b/Omap35xxPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.c @@ -159,7 +159,7 @@ DebugAgentTimerEndOfInterrupt ( while ((MmioRead32 (gTISR) & TISR_ALL_INTERRUPT_MASK) != TISR_NO_INTERRUPTS_PENDING);
MmioWrite32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWFIQAGR);
- ArmDataSyncronizationBarrier ();
+ ArmDataSynchronizationBarrier ();
}
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